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/freebsd/crypto/openssl/crypto/aes/asm/
H A Daes-riscv64.pl89 my ($I0) = use_regs(29);
155 add $I0,$TBL,$Ts->[0]
156 lwu $Ds->[0],0($I0)
157 add $I0,$TBL,$Ts->[1]
158 lwu $Ds->[1],0($I0)
159 add $I0,$TBL,$Ts->[2]
160 lwu $Ds->[2],0($I0)
161 add $I0,$TBL,$Ts->[3]
162 lwu $Ds->[3],0($I0)
201 add $I0,$TBL,$Ts->[0]
[all …]
/freebsd/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-s390x.pl226 my ($I0, $I1, $I2, $I3, $I4) = map("%v$_",(5..9));
435 vl ($I0,"0(%r1)"); # borrow $I0
436 vperm ($R0,$R0,$H0,$I0); # r^2:r^4:r^1:r^3
437 vperm ($R1,$R1,$H1,$I0);
438 vperm ($R2,$R2,$H2,$I0);
439 vperm ($R3,$R3,$H3,$I0);
440 vperm ($R4,$R4,$H4,$I0);
517 vperm ($I0,$T3,$T4,$bswaplo);
521 verimg ($I1,$I0,$mask26,6); # >>26
522 veslg ($I0,$I0,32);
[all …]
H A Dpoly1305-ppc.pl766 my ($I0, $I1, $I2, $I3, $I4) = map("v$_",(5..9));
1351 vpermdi $I0,$T1,$T2,0b00 # smash input to base 2^26
1357 vsrd $I1,$I0,$_26
1361 vand $I0,$I0,$mask26
1381 vmrgow $I0,$T1,$I0
1428 vmuleuw $ACC0,$I0,$R0
1429 vmuleuw $ACC1,$I0,$R1
1430 vmuleuw $ACC2,$I0,$R2
1448 vaddudm $H0,$H0,$I0
1472 vmuleuw $T0,$I0,$R3
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DGVNSink.cpp680 Instruction *I0 = NewInsts[0]; in analyzeInstructionForSinking() local
682 auto isNotSameOperation = [&I0](Instruction *I) { in analyzeInstructionForSinking()
683 return !I0->isSameOperationAs(I); in analyzeInstructionForSinking()
689 for (unsigned OpNum = 0, E = I0->getNumOperands(); OpNum != E; ++OpNum) { in analyzeInstructionForSinking()
693 if (!canReplaceOperandWithVariable(I0, OpNum)) in analyzeInstructionForSinking()
701 if ((isa<CallInst>(I0) || isa<InvokeInst>(I0)) && OpNum == E - 1 && in analyzeInstructionForSinking()
803 Instruction *I0 = Insts.front(); in sinkLastInstruction() local
806 for (unsigned O = 0, E = I0->getNumOperands(); O != E; ++O) { in sinkLastInstruction()
807 bool NeedPHI = llvm::any_of(Insts, [&I0, O](const Instruction *I) { in sinkLastInstruction()
808 return I->getOperand(O) != I0->getOperand(O); in sinkLastInstruction()
[all …]
H A DLoopFuse.cpp1271 bool accessDiffIsPositive(const Loop &L0, const Loop &L1, Instruction &I0, in accessDiffIsPositive()
1273 Value *Ptr0 = getLoadStorePointerOperand(&I0); in accessDiffIsPositive()
1326 const FusionCandidate &FC1, Instruction &I0, in dependencesAllowFusion()
1331 LLVM_DEBUG(dbgs() << "Check dep: " << I0 << " vs " << I1 << " : " in dependencesAllowFusion()
1337 return accessDiffIsPositive(*FC0.L, *FC1.L, I0, I1, AnyDep); in dependencesAllowFusion()
1339 auto DepResult = DI.depends(&I0, &I1); in dependencesAllowFusion()
1362 return dependencesAllowFusion(FC0, FC1, I0, I1, AnyDep, in dependencesAllowFusion()
1364 dependencesAllowFusion(FC0, FC1, I0, I1, AnyDep, in dependencesAllowFusion()
/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghashv8-armx.pl523 my ($I0,$j1,$j2,$j3,
537 vld1.64 {$I0-$j3},[$inp],#64
543 vrev64.8 $I0,$I0
579 veor $t0,$I0,$Xl
580 vld1.64 {$I0-$j3},[$inp],#64
586 vrev64.8 $I0,$I0
641 veor $t0,$I0,$Xl
663 vld1.64 {$I0-$j2},[$inp]
668 vrev64.8 $I0,$I0
692 veor $t0,$I0,$Xl
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/
H A DLegality.cpp35 auto *I0 = cast<Instruction>(Bndl[0]); in notVectorizableBasedOnOpcodesAndTypes() local
36 auto Opcode = I0->getOpcode(); in notVectorizableBasedOnOpcodesAndTypes()
45 Type *ElmTy0 = VecUtils::getElementType(Utils::getExpectedType(I0)); in notVectorizableBasedOnOpcodesAndTypes()
54 if (isa<FPMathOperator>(I0)) { in notVectorizableBasedOnOpcodesAndTypes()
65 isa<OverflowingBinaryOperator>(I0) || isa<TruncInst>(I0); in notVectorizableBasedOnOpcodesAndTypes()
67 bool NUW0 = I0->hasNoUnsignedWrap(); in notVectorizableBasedOnOpcodesAndTypes()
68 bool NSW0 = I0->hasNoSignedWrap(); in notVectorizableBasedOnOpcodesAndTypes()
98 Type *FromTy0 = Utils::getExpectedType(I0->getOperand(0)); in notVectorizableBasedOnOpcodesAndTypes()
109 auto Pred0 = cast<CmpInst>(I0)->getPredicate(); in notVectorizableBasedOnOpcodesAndTypes()
/freebsd/contrib/llvm-project/llvm/include/llvm/SandboxIR/
H A DUtils.h92 static std::optional<int> getPointerDiffInBytes(LoadOrStoreT *I0, in getPointerDiffInBytes() argument
98 llvm::Value *Opnd0 = I0->getPointerOperand()->Val; in getPointerDiffInBytes()
105 return getPointersDiff(ElemTy, Opnd0, ElemTy, Opnd1, I0->getDataLayout(), in getPointerDiffInBytes()
113 static bool atLowerAddress(LoadOrStoreT *I0, LoadOrStoreT *I1, in atLowerAddress() argument
115 auto Diff = getPointerDiffInBytes(I0, I1, SE); in atLowerAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp252 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) in verifyLeafProcRegUse()
279 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc()
283 unsigned mapped_reg = reg - SP::I0 + SP::O0; in remapRegsForLeafProc()
289 if ((reg - SP::I0) % 2 == 0) { in remapRegsForLeafProc()
290 unsigned preg = (reg - SP::I0) / 2 + SP::I0_I1; in remapRegsForLeafProc()
304 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc()
308 MBB.addLiveIn(reg - SP::I0 + SP::O0); in remapRegsForLeafProc()
H A DDelaySlotFiller.cpp403 if (reg < SP::I0 || reg > SP::I7) in combineRestoreADD()
415 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
431 if (reg < SP::I0 || reg > SP::I7) in combineRestoreOR()
454 OrMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreOR()
469 if (reg < SP::I0 || reg > SP::I7) in combineRestoreSETHIi()
488 RestoreMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreSETHIi()
H A DSparcInstrCrypto.td86 I0, I1, I2, I3, I4, I5 ],
93 I0, I1, I2, I3, I4, I5 ] in {
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DCodeMoverUtils.h33 LLVM_ABI bool isControlFlowEquivalent(const Instruction &I0,
85 LLVM_ABI bool isReachedBefore(const Instruction *I0, const Instruction *I1,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp1242 Value *I0 = II->getArgOperand(0), *I1 = II->getArgOperand(1); in foldClampRangeOfTwo() local
1245 if (!match(I1, m_APInt(C1)) || !I0->hasOneUse()) in foldClampRangeOfTwo()
1251 if (match(I0, m_SMin(m_Value(X), m_APInt(C0))) && *C0 == *C1 + 1) in foldClampRangeOfTwo()
1255 if (match(I0, m_SMax(m_Value(X), m_APInt(C0))) && *C1 == *C0 + 1) in foldClampRangeOfTwo()
1259 if (match(I0, m_UMin(m_Value(X), m_APInt(C0))) && *C0 == *C1 + 1) in foldClampRangeOfTwo()
1263 if (match(I0, m_UMax(m_Value(X), m_APInt(C0))) && *C1 == *C0 + 1) in foldClampRangeOfTwo()
1568 foldMinimumOverTrailingOrLeadingZeroCount(Value *I0, Value *I1, in foldMinimumOverTrailingOrLeadingZeroCount() argument
1576 if (!match(I0, in foldMinimumOverTrailingOrLeadingZeroCount()
1882 Value *I0 = II->getArgOperand(0), *I1 = II->getArgOperand(1); in visitCallInst() local
1887 Value *Zero = Constant::getNullValue(I0->getType()); in visitCallInst()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/
H A DSeedCollector.h145 auto Cmp = [&SE](Instruction *I0, Instruction *I1) { in MemSeedBundle()
146 return Utils::atLowerAddress(cast<LoadOrStoreT>(I0), in MemSeedBundle()
159 auto Cmp = [&SE](Instruction *I0, Instruction *I1) { in insert()
160 return Utils::atLowerAddress(cast<LoadOrStoreT>(I0), in insert()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeMoverUtils.cpp231 bool llvm::isControlFlowEquivalent(const Instruction &I0, const Instruction &I1, in isControlFlowEquivalent() argument
234 return isControlFlowEquivalent(*I0.getParent(), *I1.getParent(), DT, PDT); in isControlFlowEquivalent()
481 bool llvm::isReachedBefore(const Instruction *I0, const Instruction *I1, in isReachedBefore() argument
484 const BasicBlock *BB0 = I0->getParent(); in isReachedBefore()
487 return DT->dominates(I0, I1); in isReachedBefore()
H A DSimplifyCFG.cpp1863 Instruction *I0 = (*LRI)[0]; in hoistCommonCodeFromSuccessors() local
1864 if (any_of(*LRI, [I0](Instruction *I) { in hoistCommonCodeFromSuccessors()
1865 return !areIdenticalUpToCommutativity(I0, I); in hoistCommonCodeFromSuccessors()
2168 const Instruction *I0 = Insts.front(); in canSinkInstructions() local
2169 const auto I0MMRA = MMRAMetadata(*I0); in canSinkInstructions()
2171 if (!I->isSameOperationAs(I0, Instruction::CompareUsingIntersectedAttrs)) in canSinkInstructions()
2184 for (const Use &U : I0->uses()) { in canSinkInstructions()
2197 if (isa<CallBase>(I0)) { in canSinkInstructions()
2219 for (unsigned OI = 0, OE = I0->getNumOperands(); OI != OE; ++OI) { in canSinkInstructions()
2220 Value *Op = I0->getOperand(OI); in canSinkInstructions()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX3T110.td84 // Integer micro-ops on ports I0/I1/I2.
87 // Integer micro-ops on ports I0/I1/I2/I3.
181 // 1 cycle on I0/I1/I2/I3.
187 // 2 cycles on I0/I1/I2/I3.
193 // 3 cycles on I0/I1/I2/I3.
199 // 4 cycles on I0/I1/I2/I3.
205 // 5 cycles on I0/I1/I2/I3.
211 // 6 cycles on I0/I1/I2/I3.
217 // 8 cycles on I0/I1/I2/I3.
223 // 13 cycles on I0/I
[all...]
H A DAArch64SchedThunderX2T99.td127 // 1 cycle on I0, I1, or I2.
133 // 2 cycles on I0, I1, or I2.
139 // 4 cycles on I0, I1, or I2.
145 // 5 cycles on I0, I1, or I2.
218 // 1 cycles on LS0 or LS1 and I0, I1, or I2.
224 // 1 cycles on LS0 or LS1 and 2 of I0, I1, or I2.
255 // 4 cycles on LS0 or LS1 and I0, I1, or I2.
261 // 4 cycles on LS0 or LS1 and 2 of I0, I1, or I2.
268 // 5 cycles on LS0 or LS1 and I0, I1, or I2.
274 // 5 cycles on LS0 or LS1 and 2 of I0, I
[all...]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-href-family-pinctrl.dtsi118 "GPIO164_B21"; /* I0 */
144 "GPIO164_B21"; /* I0 */
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-vegman-n110.dts23 /*I0-I7*/ "","","","","","","","",
60 /*I0-I7*/ "","","","","","","","","","","","","","","","",
H A Daspeed-bmc-vegman-sx20.dts23 /*I0-I7*/ "","","","","","","","",
60 /*I0-I7*/ "","","","","","","","","","","","","","","","",
H A Daspeed-bmc-vegman-rx20.dts51 /*I0-I7*/ "","","","","","","","",
88 /*I0-I7*/ "","","","","","","","","","","","","","","","",
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DComplexDeinterleavingPass.cpp587 Value *I0 = Imag->getOperand(0); in identifyNodeWithImplicitAdd() local
602 if (isNeg(I0)) { in identifyNodeWithImplicitAdd()
605 I0 = Op; in identifyNodeWithImplicitAdd()
618 if (R0 == I0 || R0 == I1) { in identifyNodeWithImplicitAdd()
621 } else if (R1 == I0 || R1 == I1) { in identifyNodeWithImplicitAdd()
629 UncommonImagOp = (CommonOperand == I0) ? I1 : I0; in identifyNodeWithImplicitAdd()
716 Value *I0 = ImagMulI->getOperand(0); in identifyPartialMul() local
723 if (R0 == I0 || R0 == I1) { in identifyPartialMul()
726 } else if (R1 == I0 || R1 == I1) { in identifyPartialMul()
734 UncommonImagOp = (CommonOperand == I0) ? I1 : I0; in identifyPartialMul()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleA57.td182 // TODO: according to the doc, conditional uses I0/I1, unconditional uses M
479 // 4(3) "I0/I1,L,M" for scaled register, otherwise 4(2) "I0/I1,L"
501 // 5cyc "I0/I1,L" for minus reg or scaled not plus lsl2
604 // For minus or for not plus lsl2 scaled we need 3cyc "I0/I1, S",
613 // STRH,STRD: 3cyc "I0/I1, S" for minus reg, 1cyc S for imm or for plus reg.
625 // Store, immed pre-indexed (1cyc "S, I0/I1", 1cyc writeback)
631 // 1(1) "S, I0/I1" for plus reg
632 // 3(2) "I0/I1, S" for minus reg
634 // 3(2) "I0/I1, S" for other scaled
650 // 1(1) "S, I0/I1" for imm or reg plus
[all …]
/freebsd/sys/tools/sound/
H A Dfeeder_rate_mkfilter.awk173 function I0(x, s, u, n, h, t) function
255 ibeta = I0(beta);
261 w = I0(beta * sqrt(1.0 - (x * x))) / ibeta;

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