| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AllocationOrder.cpp | 35 SmallVector<MCPhysReg, 16> Hints; in create() local
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); in create()
40 if (!Hints.empty()) { in create()
42 for (MCPhysReg Hint : Hints) in create()
47 assert(all_of(Hints, in create()
50 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
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| H A D | AllocationOrder.h | 31 const SmallVector<MCPhysReg, 16> Hints; variable
57 return AO.Hints.end()[Pos];
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() argument
92 : Hints(std::move(Hints)), Order(Order), in AllocationOrder()
96 return Iterator(*this, -(static_cast<int>(Hints.size()))); in begin()
118 return Reg.isPhysical() && is_contained(Hints, Reg.id()); in isHint()
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaFixItUtils.cpp | 108 Hints.push_back(FixItHint::CreateRemoval( in tryToFixConversion()
112 Hints.push_back(FixItHint::CreateInsertion(Begin, "*(")); in tryToFixConversion()
113 Hints.push_back(FixItHint::CreateInsertion(End, ")")); in tryToFixConversion()
115 Hints.push_back(FixItHint::CreateInsertion(Begin, "*")); in tryToFixConversion()
146 Hints.push_back(FixItHint::CreateRemoval( in tryToFixConversion()
150 Hints.push_back(FixItHint::CreateInsertion(Begin, "&(")); in tryToFixConversion()
151 Hints.push_back(FixItHint::CreateInsertion(End, ")")); in tryToFixConversion()
153 Hints.push_back(FixItHint::CreateInsertion(Begin, "&")); in tryToFixConversion()
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| H A D | DeclSpec.cpp | 1175 FixItHint Hints[NumLocs]; in Finish() local
1183 Hints[I] = FixItHint::CreateRemoval(ExtraLocs[I]); in Finish()
1192 << Hints[0] << Hints[1] << Hints[2] << Hints[3] in Finish()
1193 << Hints[4] << Hints[5] << Hints[6] << Hints[7]; in Finish()
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| /freebsd/contrib/llvm-project/clang/include/clang/Frontend/ |
| H A D | TextDiagnostic.h | 96 ArrayRef<FixItHint> Hints) override { in emitCodeContext() argument
97 emitSnippetAndCaret(Loc, Level, Ranges, Hints); in emitCodeContext()
113 ArrayRef<FixItHint> Hints);
119 void emitParseableFixits(ArrayRef<FixItHint> Hints, const SourceManager &SM);
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| H A D | DiagnosticRenderer.h | 88 ArrayRef<FixItHint> Hints) = 0;
110 ArrayRef<CharSourceRange> Ranges, ArrayRef<FixItHint> Hints);
116 ArrayRef<FixItHint> Hints);
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| H A D | SARIFDiagnostic.h | 47 ArrayRef<FixItHint> Hints) override {} in emitCodeContext() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 58 SmallVectorImpl<MCPhysReg> &Hints, in addHints() argument
61 SmallSet<unsigned, 4> CopyHints(llvm::from_range, Hints); in addHints()
62 Hints.clear(); in addHints()
66 Hints.push_back(Reg); in addHints()
70 Hints.push_back(Reg); in addHints()
75 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
82 VirtReg, Order, Hints, MF, VRM, Matrix); in getRegAllocationHints()
117 if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) in getRegAllocationHints()
127 Hints.push_back(OrderReg); in getRegAllocationHints()
155 addHints(Order, Hints, RC, MRI); in getRegAllocationHints()
[all …]
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| H A D | SystemZRegisterInfo.h | 150 SmallVectorImpl<MCPhysReg> &Hints,
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| /freebsd/contrib/llvm-project/clang/lib/Interpreter/ |
| H A D | RemoteJITUtils.cpp | 182 addrinfo Hints{}; in connectTCPSocketImpl() local
183 Hints.ai_family = AF_INET; in connectTCPSocketImpl()
184 Hints.ai_socktype = SOCK_STREAM; in connectTCPSocketImpl()
185 Hints.ai_flags = AI_NUMERICSERV; in connectTCPSocketImpl()
187 if (int EC = getaddrinfo(Host.c_str(), PortStr.c_str(), &Hints, &AI)) in connectTCPSocketImpl()
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| /freebsd/contrib/llvm-project/clang/include/clang/Sema/ |
| H A D | SemaFixItUtils.h | 41 std::vector<FixItHint> Hints; member
80 Hints.clear(); in clear()
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| /freebsd/contrib/llvm-project/clang/lib/Frontend/ |
| H A D | TextDiagnostic.cpp | 1001 ArrayRef<FixItHint> Hints, in buildFixItInsertionLine() argument
1005 if (Hints.empty() || !DiagOpts.ShowFixits) in buildFixItInsertionLine()
1009 for (const auto &H : Hints) { in buildFixItInsertionLine()
1286 SmallVectorImpl<CharSourceRange> &Ranges, ArrayRef<FixItHint> Hints) { in emitSnippetAndCaret() argument
1298 if (Loc == LastLoc && Ranges.empty() && Hints.empty() && in emitSnippetAndCaret()
1399 buildFixItInsertionLine(FID, LineNo, sourceColMap, Hints, SM, DiagOpts); in emitSnippetAndCaret()
1444 emitParseableFixits(Hints, SM); in emitSnippetAndCaret()
1504 void TextDiagnostic::emitParseableFixits(ArrayRef<FixItHint> Hints, in emitParseableFixits() argument
1511 for (const auto &H : Hints) { in emitParseableFixits()
1517 for (const auto &H : Hints) { in emitParseableFixits()
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| H A D | SerializedDiagnosticPrinter.cpp | 76 ArrayRef<FixItHint> Hints) override;
191 ArrayRef<FixItHint> Hints,
699 ArrayRef<FixItHint> Hints, in EmitCodeContext() argument
712 for (ArrayRef<FixItHint>::iterator I = Hints.begin(), E = Hints.end(); in EmitCodeContext()
729 ArrayRef<FixItHint> Hints) { in emitCodeContext() argument
730 Writer.EmitCodeContext(Ranges, Hints, Loc.getManager()); in emitCodeContext()
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| H A D | DiagnosticRenderer.cpp | 422 ArrayRef<FixItHint> Hints) { in emitCaret() argument
425 emitCodeContext(Loc, Level, SpellingRanges, Hints); in emitCaret()
507 ArrayRef<FixItHint> Hints) { in emitMacroExpansions() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 1154 SmallVectorImpl<MCPhysReg> &Hints, in getRegAllocationHints() argument
1161 VirtReg, Order, Hints, MF, VRM, Matrix); in getRegAllocationHints()
1181 if (PhysReg && !MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) in getRegAllocationHints()
1208 Hints.push_back(OrderReg); in getRegAllocationHints()
1217 Hints.push_back(PhysReg); in getRegAllocationHints()
1222 Hints.push_back(PhysReg); in getRegAllocationHints()
1225 SmallSet<MCPhysReg, 4> CopyHints(llvm::from_range, Hints); in getRegAllocationHints()
1226 Hints.clear(); in getRegAllocationHints()
1240 for (auto Hint : Hints) { in getRegAllocationHints()
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| H A D | X86RegisterInfo.h | 175 SmallVectorImpl<MCPhysReg> &Hints,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 1136 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
1141 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, in getRegAllocationHints()
1253 Hints.push_back(Reg); in getRegAllocationHints()
1265 Hints.push_back(StridedOrder[I]); in getRegAllocationHints()
1268 if (!Hints.empty()) in getRegAllocationHints()
1269 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, in getRegAllocationHints()
1277 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, in getRegAllocationHints()
1301 Hints.push_back(Order[I]); in getRegAllocationHints()
1304 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, in getRegAllocationHints()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorizationPlanner.h | 435 const LoopVectorizeHints &Hints; variable
468 PredicatedScalarEvolution &PSE, const LoopVectorizeHints &Hints, in LoopVectorizationPlanner() argument
471 IAI(IAI), PSE(PSE), Hints(Hints), ORE(ORE) {} in LoopVectorizationPlanner()
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| H A D | LoopVectorize.cpp | 832 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE); in reportVectorizationFailure() local
834 createLVAnalysis(Hints.vectorizeAnalysisPassName(), ORETag, TheLoop, I) in reportVectorizationFailure()
847 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE); local
848 ORE->emit(createLVAnalysis(Hints.vectorizeAnalysisPassName(), ORETag, TheLoop,
915 const LoopVectorizeHints *Hints, in LoopVectorizationCostModel() argument
920 Hints(Hints), InterleaveInfo(IAI) { in LoopVectorizationCostModel()
997 return !Hints->allowReordering() && RdxDesc.isOrdered(); in useOrderedReductions()
1718 const LoopVectorizeHints *Hints; member in llvm::LoopVectorizationCostModel
2056 LoopVectorizeHints Hints(OuterLp, true /*DisableInterleaving*/, *ORE); in isExplicitVecOuterLoop() local
2060 if (Hints.getForce() == LoopVectorizeHints::FK_Undefined) in isExplicitVecOuterLoop()
[all …]
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| H A D | LoopVectorizationLegality.cpp | 303 Hint *Hints[] = {&Width, &Interleave, &Force, in setHint() local
305 for (auto *H : Hints) { in setHint()
1027 Hints->setPotentiallyUnsafe(); in canVectorizeInstrs()
1205 return OptimizationRemarkAnalysis(Hints->vectorizeAnalysisPassName(), in canVectorizeMemory()
1308 if (!Requirements->getExactFPInst() || Hints->allowReordering()) in canVectorizeFPMath()
1891 if (Hints->getForce() == LoopVectorizeHints::FK_Enabled) in canVectorize()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 367 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
381 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
383 Hints.push_back(ARM::LR); in getRegAllocationHints()
386 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
405 Hints.push_back(PairedPhys); in getRegAllocationHints()
415 Hints.push_back(Reg); in getRegAllocationHints()
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| H A D | ARMBaseRegisterInfo.h | 107 SmallVectorImpl<MCPhysReg> &Hints,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.h | 261 ORE(ORE), Requirements(R), Hints(H), DB(DB), AC(AC), BFI(BFI), in LoopVectorizationLegality()
628 LoopVectorizeHints *Hints; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.h | 143 SmallVectorImpl<MCPhysReg> &Hints,
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| /freebsd/contrib/libpcap/cmake/Modules/ |
| H A D | FindAirPcap.cmake | 18 # Hints and Backward Compatibility
|