Searched refs:HiSrc (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 3159 SDValue HiSrc; in buildRegSequence16() local
3160 if (isExtractHiElt(Elts[i + 1], HiSrc) && LoSrc == HiSrc) { in buildRegSequence16()
3161 PackedElts.push_back(HiSrc); in buildRegSequence16()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4486 /// vector of the rotate or -1 for undef. \p HiSrc indicates the second vector
4487 /// of the rotate or -1 for undef. At least one of \p LoSrc and \p HiSrc will be
4493 static int isElementRotate(int &LoSrc, int &HiSrc, ArrayRef<int> Mask) { in isElementRotate()
4505 HiSrc = -1; in isElementRotate()
4534 int &TargetSrc = StartIdx < 0 ? HiSrc : LoSrc; in isElementRotate()
4548 assert((LoSrc >= 0 || HiSrc >= 0) && in isElementRotate()
5217 int LoSrc, HiSrc; in lowerVECTOR_SHUFFLE()
5218 int Rotation = isElementRotate(LoSrc, HiSrc, Mask); in lowerVECTOR_SHUFFLE()
5225 if (HiSrc >= 0) { in lowerVECTOR_SHUFFLE()
5226 HiV = HiSrc in lowerVECTOR_SHUFFLE()
4492 isElementRotate(int & LoSrc,int & HiSrc,ArrayRef<int> Mask) isElementRotate() argument
5216 int LoSrc, HiSrc; lowerVECTOR_SHUFFLE() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8578 SDValue HiSrc = extract128BitVector(SrcVec, 16, DAG, DL); in createVariablePermute() local
8583 DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, LoIdx), in createVariablePermute()
8584 DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, HiIdx)); in createVariablePermute()
|