Searched refs:HiRegList (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 149 static const MCPhysReg HiRegList[] = { PPC::R3, PPC::R5, PPC::R7, PPC::R9 }; in CC_PPC32_SPE_CustomSplitFP64() local
153 MCRegister Reg = State.AllocateReg(HiRegList); in CC_PPC32_SPE_CustomSplitFP64()
158 for (i = 0; i < std::size(HiRegList); ++i) in CC_PPC32_SPE_CustomSplitFP64()
159 if (HiRegList[i] == Reg) in CC_PPC32_SPE_CustomSplitFP64()
178 static const MCPhysReg HiRegList[] = { PPC::R3 }; in CC_PPC32_SPE_RetF64() local
182 MCRegister Reg = State.AllocateReg(HiRegList, LoRegList); in CC_PPC32_SPE_RetF64()
187 for (i = 0; i < std::size(HiRegList); ++i) in CC_PPC32_SPE_RetF64()
188 if (HiRegList[i] == Reg) in CC_PPC32_SPE_RetF64()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.cpp | 64 static const MCPhysReg HiRegList[] = { ARM::R0, ARM::R2 }; in f64AssignAAPCS() local
69 MCRegister Reg = State.AllocateReg(HiRegList, ShadowRegList); in f64AssignAAPCS()
88 if (HiRegList[i] == Reg) in f64AssignAAPCS()
115 static const MCPhysReg HiRegList[] = { ARM::R0, ARM::R2 }; in f64RetAssign() local
118 MCRegister Reg = State.AllocateReg(HiRegList, LoRegList); in f64RetAssign()
124 if (HiRegList[i] == Reg) in f64RetAssign()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/ |
| H A D | DemangleTestCases.inc | 24632 …n(unsigned int&, llvm::MVT&, llvm::MVT&, llvm::CCValAssign::LocInfo&, llvm::CCState&)::HiRegList"},
24637 …gned int&, llvm::MVT&, llvm::MVT&, llvm::CCValAssign::LocInfo&, llvm::CCState&, bool)::HiRegList"},
24658 …gned int&, llvm::MVT&, llvm::MVT&, llvm::CCValAssign::LocInfo&, llvm::CCState&, bool)::HiRegList"},
24663 …n(unsigned int&, llvm::MVT&, llvm::MVT&, llvm::CCValAssign::LocInfo&, llvm::CCState&)::HiRegList"},
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