Searched refs:HiRHS (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3177 SDValue HiLHS, HiRHS; in LowerUMULO_SMULO() local
3180 HiRHS = DAG.getNode(ISD::SRA, dl, MVT::i64, RHS, ShiftAmt); in LowerUMULO_SMULO()
3183 HiRHS = DAG.getConstant(0, dl, MVT::i64); in LowerUMULO_SMULO()
3186 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS }; in LowerUMULO_SMULO()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1871 SDValue LoLHS, HiLHS, LoRHS, HiRHS; in SplitVecRes_OverflowOp()
1874 GetSplitVector(N->getOperand(1), LoRHS, HiRHS); in SplitVecRes_OverflowOp()
1877 std::tie(LoRHS, HiRHS) = DAG.SplitVectorOperand(N, 1); in SplitVecRes_OverflowOp()
1884 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode(); in SplitVecRes_OverflowOp()
1867 SDValue LoLHS, HiLHS, LoRHS, HiRHS; SplitVecRes_OverflowOp() local
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| H A D | TargetLowering.cpp | 10612 SDValue HiRHS; in forceExpandWideMUL() local
10620 HiRHS = DAG.getNode( in forceExpandWideMUL()
10625 HiRHS = DAG.getConstant(0, dl, VT); in forceExpandWideMUL()
10628 forceExpandWideMUL(DAG, dl, Signed, WideVT, LHS, HiLHS, RHS, HiRHS, Lo, Hi); in forceExpandWideMUL()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3975 SDValue HiRHS = DAG.getConstant(ValHi, SL, MVT::i32); in splitBinaryBitConstantOpImpl() local
3978 SDValue HiAnd = DAG.getNode(Opc, SL, MVT::i32, Hi, HiRHS); in splitBinaryBitConstantOpImpl()
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