Searched refs:HiOps (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3584 SDValue HiOps[3] = { LHSH, RHSH }; in ExpandIntRes_ADDSUB() local 3593 HiOps[2] = Lo.getValue(1); in ExpandIntRes_ADDSUB() 3594 Hi = DAG.computeKnownBits(HiOps[2]).isZero() in ExpandIntRes_ADDSUB() 3595 ? DAG.getNode(ISD::ADD, dl, NVT, ArrayRef(HiOps, 2)) in ExpandIntRes_ADDSUB() 3596 : DAG.getNode(ISD::UADDO_CARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 3599 HiOps[2] = Lo.getValue(1); in ExpandIntRes_ADDSUB() 3600 Hi = DAG.computeKnownBits(HiOps[2]).isZero() in ExpandIntRes_ADDSUB() 3601 ? DAG.getNode(ISD::SUB, dl, NVT, ArrayRef(HiOps, 2)) in ExpandIntRes_ADDSUB() 3602 : DAG.getNode(ISD::USUBO_CARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 3621 HiOps[2] = Lo.getValue(1); in ExpandIntRes_ADDSUB() [all …]
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| H A D | LegalizeVectorTypes.cpp | 1620 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end()); in SplitVecRes_BUILD_VECTOR() local 1621 Hi = DAG.getBuildVector(HiVT, dl, HiOps); in SplitVecRes_BUILD_VECTOR() 1641 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end()); in SplitVecRes_CONCAT_VECTORS() local 1642 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps); in SplitVecRes_CONCAT_VECTORS()
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| H A D | TargetLowering.cpp | 12290 SmallVector<SDValue, 4> LoOps, HiOps; in expandVectorNaryOpBySplitting() local 12294 HiOps.push_back(Hi); in expandVectorNaryOpBySplitting() 12298 SDValue SplitOpHi = DAG.getNode(Opcode, DL, HiVT, HiOps); in expandVectorNaryOpBySplitting()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4146 SmallVector<SDValue, 8> HiOps; in performShlCombine() local 4149 DAG.ExtractVectorElements(NewShift, HiOps, 0, NElts); in performShlCombine() 4151 HiAndLoOps[2 * I + 1] = HiOps[I]; in performShlCombine() 4215 SmallVector<SDValue, 8> HiOps(NElts); in performSraCombine() local 4220 HiOps[I] = HiAndLoOps[2 * I + 1]; in performSraCombine() 4222 Hi = DAG.getNode(ISD::BUILD_VECTOR, LHSSL, TargetType, HiOps); in performSraCombine() 4244 SmallVector<SDValue, 8> HiOps; in performSraCombine() local 4248 DAG.ExtractVectorElements(HiShift, HiOps, 0, NElts); in performSraCombine() 4251 HiAndLoOps[2 * I + 1] = HiOps[I]; in performSraCombine() 4332 SmallVector<SDValue, 8> HiOps(NElts); in performSrlCombine() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4282 SmallVector<SDValue, 2> LoOps, HiOps; in collectConcatOps() local 4284 collectConcatOps(Hi.getNode(), HiOps, DAG) && in collectConcatOps() 4285 LoOps.size() == HiOps.size()) { in collectConcatOps() 4287 Ops.append(HiOps); in collectConcatOps() 4375 SmallVector<SDValue, 2> HiOps(SubOps.begin() + HalfOps, SubOps.end()); in splitVector() local 4377 SDValue Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, HiOps); in splitVector() 4398 SmallVector<SDValue> HiOps(NumOps, SDValue()); in splitVectorOp() local 4402 LoOps[I] = HiOps[I] = SrcOp; in splitVectorOp() 4405 std::tie(LoOps[I], HiOps[I]) = splitVector(SrcOp, DAG, dl); in splitVectorOp() 4412 DAG.getNode(Op.getOpcode(), dl, HiVT, HiOps)); in splitVectorOp() [all …]
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