| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsRISCVXsf.td | 45 class RISCVSFCustomVC_XV<bit HasDst, bit HasSE, bit ImmScalar>
46 : Intrinsic<!if(HasDst, [llvm_anyvector_ty], []),
47 !listconcat(!if(HasDst, [llvm_anyint_ty, llvm_anyvector_ty],
51 … !if(HasDst, [], [ImmArg<ArgIndex<1>>]), // Vd or bit<11-7>
52 !if(ImmScalar, !if(HasDst, [ImmArg<ArgIndex<2>>],
57 HasDst: 2,
59 let VLOperand = !if(HasDst, 3, 4);
64 class RISCVSFCustomVC_XVV<bit HasDst, bit HasSE, bit ImmScalar>
65 : Intrinsic<!if(HasDst, [llvm_anyvector_ty], []),
66 !listconcat(!if(HasDst, [llvm_anyint_ty, llvm_anyvector_ty, llvm_anyvector_ty],
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.td | 2270 class getOutsDPP <bit HasDst, ValueType DstVT, RegisterOperand DstRCDPP> {
2271 dag ret = !if(HasDst,
2279 class getOutsSDWA <bit HasDst, ValueType DstVT, RegisterOperand DstRCSDWA> {
2280 dag ret = !if(HasDst,
2289 class getAsm32 <bit HasDst, int NumSrcArgs, ValueType DstVT = i32> {
2294 string ret = !if(HasDst, dst, "") #
2314 class getAsmVOP3P <bit HasDst, int NumSrcArgs, bit HasNeg,
2316 string dst = !if(HasDst, "$vdst"# !if(!gt(NumSrcArgs, 0), ",", ""), "");
2332 class getAsmDPP <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT = i32> {
2333 string dst = !if(HasDst,
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| H A D | R600ISelLowering.cpp | 1971 bool HasDst = TII->getOperandIdx(Opcode, R600::OpName::dst) > -1; in FoldOperand() local
1999 if (HasDst) { in FoldOperand()
2124 bool HasDst = TII->getOperandIdx(Opcode, R600::OpName::dst) > -1; in PostISelFolding() local
2126 if (HasDst) in PostISelFolding()
2163 bool HasDst = TII->getOperandIdx(Opcode, R600::OpName::dst) > -1; in PostISelFolding() local
2166 if (HasDst) { in PostISelFolding()
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| H A D | VINTERPInstructions.td | 33 let Inst{14} = !if(P.HasDst, src0_modifiers{3}, 0);
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| H A D | VOPInstructions.td | 273 let Inst{14} = !if(!and(P.HasDst, P.HasSrc0Mods), src0_modifiers{3}, 0);
329 let Inst{14} = !if(P.HasDst, src0_modifiers{3}, 0);
348 let Inst{14} = !if(p.HasDst, src0_modifiers{3}, 0);
357 let Inst{14} = !if(!and(p.HasOpSel, p.HasDst), src0_modifiers{3}, 0);
373 let Inst{14} = !if(!and(p.HasDst, p.HasSrc0Mods), src0_modifiers{3}, 0);
452 let Inst{7-0} = !if(P.HasDst, vdst, 0);
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| H A D | VOP1Instructions.td | 447 getAsmVOP3Base<NumSrcArgs, 1 /* HasDst */, HasClamp,
451 let HasDst = 0;
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| H A D | VOP3Instructions.td | 666 getAsmVOP3Base<NumSrcArgs, HasDst, HasClamp,
1491 let AsmVOP3Base = getAsmVOP3Base<NumSrcArgs, HasDst, HasClamp,
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| H A D | VOPCInstructions.td | 156 let HasDst = 0;
970 let HasDst = 0;
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| H A D | VOP2Instructions.td | 527 getAsmVOP3Base<2 /*NumSrcArgs*/, HasDst, HasClamp,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 1224 const bool HasDst = in printPackedModifier() local
1246 HasDst && NumOps > 0 && Mod == SISrcMods::OP_SEL_0 && in printPackedModifier()
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