| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 41 bool HasAVX512 = Subtarget.hasAVX512(); in X86LegalizerInfo() local
77 const LLT s8MaxVector = HasAVX512 ? v64s8 : HasAVX ? v32s8 : v16s8; in X86LegalizerInfo()
78 const LLT s16MaxVector = HasAVX512 ? v32s16 : HasAVX ? v16s16 : v8s16; in X86LegalizerInfo()
79 const LLT s32MaxVector = HasAVX512 ? v16s32 : HasAVX ? v8s32 : v4s32; in X86LegalizerInfo()
80 const LLT s64MaxVector = HasAVX512 ? v8s64 : HasAVX ? v4s64 : v2s64; in X86LegalizerInfo()
148 if (HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query)) in X86LegalizerInfo()
160 .clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX2 ? 8 : 4)) in X86LegalizerInfo()
161 .clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX2 ? 4 : 2)) in X86LegalizerInfo()
189 if (HasAVX512 && typeInSet(0, {v16s32})(Query)) in X86LegalizerInfo()
203 .clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX2 ? 8 : 4)) in X86LegalizerInfo()
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| H A D | X86InstructionSelector.cpp | 455 bool HasAVX512 = STI.hasAVX512(); in getLoadStoreOp() local
468 return Isload ? (HasAVX512 ? X86::VMOVSSZrm_alt : in getLoadStoreOp()
471 : (HasAVX512 ? X86::VMOVSSZmr : in getLoadStoreOp()
480 return Isload ? (HasAVX512 ? X86::VMOVSDZrm_alt : in getLoadStoreOp()
483 : (HasAVX512 ? X86::VMOVSDZmr : in getLoadStoreOp()
493 : HasAVX512 in getLoadStoreOp()
497 : HasAVX512 in getLoadStoreOp()
502 : HasAVX512 in getLoadStoreOp()
506 : HasAVX512 in getLoadStoreOp()
512 : HasAVX512 ? X86::VMOVAPSZ256rm_NOVLX in getLoadStoreOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LegalizerInfo.cpp | |
| H A D | X86RegisterInfo.cpp | 289 bool HasAVX512 = Subtarget.hasAVX512(); in getCalleeSavedRegs() local
327 if (HasAVX512 && IsWin64) in getCalleeSavedRegs()
329 if (HasAVX512 && Is64Bit) in getCalleeSavedRegs()
374 if (HasAVX512) in getCalleeSavedRegs()
382 if (HasAVX512) in getCalleeSavedRegs()
426 bool HasAVX512 = Subtarget.hasAVX512(); in getCallPreservedMask() local
449 if (HasAVX512 && IsWin64) in getCallPreservedMask()
451 if (HasAVX512 && Is64Bit) in getCallPreservedMask()
492 if (HasAVX512) in getCallPreservedMask()
500 if (HasAVX512) in getCallPreservedMask()
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| H A D | X86InstructionSelector.cpp | |
| H A D | X86InstrAVX512.td | 290 isPseudo = 1, Predicates = [HasAVX512], SchedRW = [WriteZero] in {
297 let Predicates = [HasAVX512] in {
309 let isPseudo = 1, Predicates = [HasAVX512], SchedRW = [WriteVecALU] in {
323 isPseudo = 1, Predicates = [HasAVX512], SchedRW = [WriteZero] in {
330 let Predicates = [HasAVX512] in {
348 isPseudo = 1, SchedRW = [WriteZero], Predicates = [HasAVX512] in {
481 vinsert128_insert, INSERT_get_vinsert128_imm, [HasAVX512]>;
483 vinsert128_insert, INSERT_get_vinsert128_imm, [HasAVX512]>;
486 vinsert256_insert, INSERT_get_vinsert256_imm, [HasAVX512]>;
488 vinsert256_insert, INSERT_get_vinsert256_imm, [HasAVX512]>;
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| H A D | X86FastISel.cpp | 324 bool HasAVX512 = Subtarget->hasAVX512(); in X86FastEmitLoad() local
350 Opc = HasAVX512 ? X86::VMOVSSZrm_alt in X86FastEmitLoad()
356 Opc = HasAVX512 ? X86::VMOVSDZrm_alt in X86FastEmitLoad()
437 assert(HasAVX512); in X86FastEmitLoad()
444 assert(HasAVX512); in X86FastEmitLoad()
454 assert(HasAVX512); in X86FastEmitLoad()
485 bool HasAVX512 = Subtarget->hasAVX512(); in X86FastEmitStore() local
517 Opc = HasAVX512 ? X86::VMOVSSZmr : in X86FastEmitStore()
527 Opc = HasAVX512 ? X86::VMOVSDZmr : in X86FastEmitStore()
608 assert(HasAVX512); in X86FastEmitStore()
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| H A D | X86InstrUtils.td | 485 let Predicates = !if(!eq(OpEnc.Value, EncEVEX.Value), [HasAVX512],
502 let Predicates = !if(!eq(OpEnc.Value, EncEVEX.Value), [HasAVX512],
518 let Predicates = !if(!eq(OpEnc.Value, EncEVEX.Value), [HasAVX512],
533 let Predicates = !if(!eq(OpEnc.Value, EncEVEX.Value), [HasAVX512],
556 let Predicates = !if(!eq(OpEnc.Value, EncEVEX.Value), [HasAVX512],
782 Requires<[HasAVX512]>;
789 Requires<[HasAVX512]>;
793 Requires<[HasAVX512]>;
797 Requires<[HasAVX512]>;
801 Requires<[HasAVX512]>;
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| H A D | X86InstrVecCompiler.td | 28 let Predicates = [HasAVX512] in {
162 let Predicates = [HasAVX512, NoVLX] in {
230 let Predicates = [HasAVX512] in {
280 let Predicates = [HasAVX512] in {
297 let Predicates = [HasAVX512, NoDQI] in {
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| H A D | X86InstrInfo.cpp | 4161 bool HasAVX512 = Subtarget.hasAVX512(); in CopyToFromAsymmetricReg() local
4202 return HasAVX512 ? X86::VMOVPQIto64Zrr in CopyToFromAsymmetricReg()
4211 return HasAVX512 ? X86::VMOV64toPQIZrr in CopyToFromAsymmetricReg()
4225 return HasAVX512 ? X86::VMOVPDI2DIZrr in CopyToFromAsymmetricReg()
4232 return HasAVX512 ? X86::VMOVDI2PDIZrr in CopyToFromAsymmetricReg()
4356 bool HasAVX512 = STI.hasAVX512(); in getLoadStoreRegOpcode() local
4382 return Load ? (HasAVX512 ? X86::VMOVSSZrm_alt in getLoadStoreRegOpcode()
4385 : (HasAVX512 ? X86::VMOVSSZmr in getLoadStoreRegOpcode()
4411 return Load ? (HasAVX512 ? X86::VMOVSDZrm_alt in getLoadStoreRegOpcode()
4414 : (HasAVX512 ? X86::VMOVSDZmr in getLoadStoreRegOpcode()
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| H A D | X86InstrPredicates.td | 74 def HasAVX512 : Predicate<"Subtarget->hasAVX512()">;
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| H A D | X86InstrCompiler.td | 591 let Predicates = [HasAVX512] in {
1116 Requires<[HasAVX512]>;
1126 Requires<[HasAVX512]>;
1198 (VMOVSSZmr addr:$dst, FR32:$src)>, Requires<[HasAVX512]>;
1205 (VMOVSDmr addr:$dst, FR64:$src)>, Requires<[HasAVX512]>;
1212 (VMOVSSZrm_alt addr:$src)>, Requires<[HasAVX512]>;
1219 (VMOVSDZrm_alt addr:$src)>, Requires<[HasAVX512]>;
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