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Searched refs:HRI (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp276 const HexagonRegisterInfo &HRI) { in needsStackFrame() argument
306 for (MCPhysReg S : HRI.subregs_inclusive(R)) in needsStackFrame()
402 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in findShrunkPrologEpilog() local
433 for (const MCPhysReg *P = HRI.getCalleeSavedRegs(&MF); *P; ++P) in findShrunkPrologEpilog()
434 for (MCPhysReg S : HRI.subregs_inclusive(*P)) in findShrunkPrologEpilog()
438 if (needsStackFrame(I, CSR, HRI)) in findShrunkPrologEpilog()
502 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in emitPrologue() local
512 insertCSRSpillsInBlock(*PrologB, CSI, HRI, PrologueStubs); in emitPrologue()
517 insertCSRRestoresInBlock(*EpilogB, CSI, HRI); in emitPrologue()
522 insertCSRRestoresInBlock(B, CSI, HRI); in emitPrologue()
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H A DHexagonVLIWPacketizer.cpp109 const HexagonRegisterInfo *HRI = nullptr; member in __anon73fb695d0111::HexagonPacketizer
132 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in INITIALIZE_PASS_DEPENDENCY()
204 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
297 if (DepReg == HRI->getRARegister()) in isCallDependent()
301 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister()) in isCallDependent()
482 if (HII->isValidOffset(Opc, NewOff, HRI)) { in useCallersSP()
533 if (!HII->isValidOffset(MI.getOpcode(), Offset+Incr, HRI)) in updateOffset()
656 const TargetRegisterClass *PacketRC = HII->getRegClass(MCID, 0, HRI, MF); in canPromoteToNewValueStore()
706 predRegClass = HRI->getMinimalPhysRegClass(predRegNumSrc); in canPromoteToNewValueStore()
718 predRegClass = HRI->getMinimalPhysRegClass(predRegNumDst); in canPromoteToNewValueStore()
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H A DHexagonInstrInfo.cpp135 static bool isDblRegForSubInst(Register Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst() argument
136 return isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::isub_lo)) && in isDblRegForSubInst()
137 isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::isub_hi)); in isDblRegForSubInst()
865 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in copyPhysReg() local
926 LivePhysRegs LiveAtMI(HRI); in copyPhysReg()
928 Register SrcLo = HRI.getSubReg(SrcReg, Hexagon::vsub_lo); in copyPhysReg()
929 Register SrcHi = HRI.getSubReg(SrcReg, Hexagon::vsub_hi); in copyPhysReg()
957 << printReg(DestReg, &HRI) << " = " << printReg(SrcReg, &HRI) << '\n'; in copyPhysReg()
1059 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in expandPostRAPseudo() local
1060 LivePhysRegs LiveIn(HRI), LiveOut(HRI); in expandPostRAPseudo()
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H A DHexagonVExtract.cpp99 const auto &HRI = *HST->getRegisterInfo(); in runOnMachineFunction() local
135 Align Alignment = HRI.getSpillAlign(VecRC); in runOnMachineFunction()
141 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Alignment, in runOnMachineFunction()
156 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction()
H A DHexagonBitSimplify.cpp446 auto &HRI = static_cast<const HexagonRegisterInfo&>( in parseRegSequence() local
448 unsigned SubLo = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_lo); in parseRegSequence()
449 unsigned SubHi = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_hi); in parseRegSequence()
910 auto &HRI = static_cast<const HexagonRegisterInfo&>( in getFinalVRegClass() local
913 auto VerifySR = [&HRI] (const TargetRegisterClass *RC, unsigned Sub) -> void { in getFinalVRegClass()
914 (void)HRI; in getFinalVRegClass()
915 assert(Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_lo) || in getFinalVRegClass()
916 Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_hi)); in getFinalVRegClass()
1061 : Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {} in RedundantInstrElimination()
1076 const HexagonRegisterInfo &HRI; member in __anonbc27dab50511::RedundantInstrElimination
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H A DHexagonGenMux.cpp81 const HexagonRegisterInfo *HRI = nullptr; member in __anoncf1483fd0111::HexagonGenMux
139 for (MCPhysReg I : HRI->subregs(Reg)) in getSubRegs()
173 unsigned NR = HRI->getNumRegs(); in buildMaps()
340 LiveRegUnits LPR(*HRI); in genMuxInBlock()
366 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction()
H A DHexagonConstExtenders.cpp371 const HexagonRegisterInfo *HRI = nullptr; member
433 : Rs(R), HRI(I) {} in PrintRegister()
435 const HexagonRegisterInfo &HRI; member
441 OS << printReg(P.Rs.Reg, &P.HRI, P.Rs.Sub); in operator <<()
449 : Ex(E), HRI(I) {} in PrintExpr()
451 const HexagonRegisterInfo &HRI; member
458 OS << printReg(P.Ex.Rs.Reg, &P.HRI, P.Ex.Rs.Sub); in operator <<()
467 : ExtI(EI), HRI(I) {} in PrintInit()
469 const HexagonRegisterInfo &HRI; member
475 << PrintExpr(P.ExtI.second, P.HRI) << ']'; in operator <<()
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H A DHexagonISelDAGToDAG.h31 const HexagonRegisterInfo *HRI; variable
39 HRI(nullptr) {} in HexagonDAGToDAGISel()
45 HRI = HST->getRegisterInfo(); in runOnMachineFunction()
H A DHexagonGenInsert.cpp560 const HexagonRegisterInfo *HRI = nullptr; member in __anon7f002ed80511::HexagonGenInsert
578 dbgs() << " " << printReg(I.first, HRI) << ":\n"; in dump_map()
581 dbgs() << " " << PrintIFR(J.first, HRI) << ", " in dump_map()
582 << PrintRegSet(J.second, HRI) << '\n'; in dump_map()
779 dbgs() << __func__ << ": " << printReg(VR, HRI) in findRecordInsertForms()
780 << " AVs: " << PrintORL(AVs, HRI) << "\n"; in findRecordInsertForms()
844 dbgs() << "Prefixes matching register " << printReg(VR, HRI) << "\n"; in findRecordInsertForms()
849 dbgs() << " (" << printReg(J.first, HRI) << ",@" << J.second << ')'; in findRecordInsertForms()
894 dbgs() << printReg(VR, HRI) << " = insert(" << printReg(SrcR, HRI) in findRecordInsertForms()
895 << ',' << printReg(InsR, HRI) << ",#" << L << ",#" in findRecordInsertForms()
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H A DHexagonBranchRelaxation.cpp61 const HexagonRegisterInfo *HRI; member
88 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
H A DHexagonFrameLowering.h129 const HexagonRegisterInfo &HRI, bool &PrologueStubs) const;
131 const HexagonRegisterInfo &HRI) const;
H A DHexagonOptAddrMode.cpp82 const HexagonRegisterInfo *HRI = nullptr; member in __anon8a08179c0111::HexagonOptAddrMode
367 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false); in isValidOffset()
373 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false); in isValidOffset()
402 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false); in isValidOffset()
1157 HRI = HST.getRegisterInfo(); in runOnMachineFunction()
1161 DataFlowGraph G(MF, *HII, *HRI, *MDT, MDF); in runOnMachineFunction()
H A DHexagonRDFOpt.cpp301 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() local
308 DataFlowGraph G(MF, HII, HRI, *MDT, MDF); in runOnMachineFunction()
H A DHexagonVLIWPacketizer.h77 const HexagonRegisterInfo *HRI; variable
H A DHexagonBitTracker.cpp85 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in mask() local
86 bool IsSubLo = (Sub == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo)); in mask()
127 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in composeWithSubRegIndex() local
128 bool IsSubLo = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo)); in composeWithSubRegIndex()
129 bool IsSubHi = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi)); in composeWithSubRegIndex()
H A DHexagonISelLowering.cpp530 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local
532 DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT); in LowerCall()
596 Align VecAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in LowerCall()
662 const uint32_t *Mask = HRI.getCallPreservedMask(MF, CallConv); in LowerCall()
736 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerINLINEASM() local
737 unsigned LR = HRI.getRARegister(); in LowerINLINEASM()
1256 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local
1273 Register Reg = MF.addLiveIn(HRI.getRARegister(), getRegClassFor(MVT::i32)); in LowerRETURNADDR()
1279 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local
1287 HRI.getFrameRegister(), VT); in LowerFRAMEADDR()
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H A DHexagonAsmPrinter.cpp269 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in HexagonProcessInstruction() local
270 unsigned VectorSize = HRI.getRegSizeInBits(Hexagon::HvxVRRegClass) / 8; in HexagonProcessInstruction()
H A DHexagonConstPropagation.cpp1884 const HexagonRegisterInfo &HRI; member in __anonfe19b4d40611::HexagonConstEvaluator
1917 HRI(*Fn.getSubtarget<HexagonSubtarget>().getRegisterInfo()) { in HexagonConstEvaluator()
1950 unsigned SubLo = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_lo); in evaluate()
1951 unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi); in evaluate()
2813 dbgs() << "Top " << printReg(R.Reg, &HRI, R.SubReg) in rewriteHexConstDefs()
H A DHexagonISelDAGToDAG.cpp1429 auto &HRI = *HST.getRegisterInfo(); in emitFunctionEntryCode() local
1430 BitVector Reserved = HRI.getReservedRegs(*MF); in emitFunctionEntryCode()
1431 for (const MCPhysReg *R = HRI.getCalleeSavedRegs(MF); *R; ++R) { in emitFunctionEntryCode()
H A DHexagonPatternsHVX.td96 int32_t VecSize = HRI->getSpillSize(Hexagon::HvxVRRegClass);