Searched refs:GenericOpc (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 820 static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, in selectBinaryOp() argument
825 switch (GenericOpc) { in selectBinaryOp()
833 return GenericOpc; in selectBinaryOp()
836 switch (GenericOpc) { in selectBinaryOp()
846 return GenericOpc; in selectBinaryOp()
853 switch (GenericOpc) { in selectBinaryOp()
863 return GenericOpc; in selectBinaryOp()
866 switch (GenericOpc) { in selectBinaryOp()
878 return GenericOpc; in selectBinaryOp()
883 return GenericOpc; in selectBinaryOp()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 154 static unsigned selectLoadStoreOp(unsigned GenericOpc, unsigned RegBankID, in selectLoadStoreOp() argument
156 const bool IsStore = GenericOpc == TargetOpcode::G_STORE; in selectLoadStoreOp()
181 return GenericOpc; in selectLoadStoreOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 57425 unsigned GenericOpc = IsSub ? ISD::SUB : ISD::ADD; in combineX86AddSub() local
57433 SDValue Res = DAG.getNode(GenericOpc, DL, VT, LHS, RHS); in combineX86AddSub()
57441 if (SDNode *GenericAddSub = DAG.getNodeIfExists(GenericOpc, VTs, Ops)) { in combineX86AddSub()
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