Gather (reference) in projects: freebsd

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Searched refs:Gather (Results 1 – 25 of 49) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A D	X86InstrOperands.td	`27 // Gather mem operands 62 // Gather mem operands 97 // Gather mem operands`
/freebsd/sys/dev/cxgbe/firmware/
H A D	t4fw_cfg.txt	`157 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t6fw_cfg_hashfilter.txt	`186 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t5fw_cfg.txt	`202 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t5fw_cfg_hashfilter.txt	`205 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t6fw_cfg.txt	`204 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t5fw_cfg_fpga.txt	`89 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 392 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t6fw_cfg_fpga.txt	`68 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 412 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t4fw_cfg_uwire.txt	`82 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 444 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t5fw_cfg_uwire.txt	`68 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 489 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t6fw_cfg_uwire.txt	`68 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 507 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t7fw_cfg.txt	`68 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 545 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
H A D	t7fw_cfg_uwire.txt	`68 # The following Scatter Gather Engine (SGE) settings assume a 4KB Host 545 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL`
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A D	AArch64SchedA510.td	`1243 // Gather load, vector + imm, 32-bit element size 1247 // Gather load, vector + imm, 64-bit element size 1251 // Gather load, 64-bit element size 1258 // Gather load, 32-bit scaled offset 1263 // Gather load, 32-bit unpacked unscaled offset`
H A D	AArch64SchedA320.td	`1265 // Gather load, vector + imm, 32-bit element size 1269 // Gather load, vector + imm, 64-bit element size 1273 // Gather load, 64-bit element size 1280 // Gather load, 32-bit scaled offset 1285 // Gather load, 32-bit unpacked unscaled offset`
H A D	AArch64SchedNeoverseN2.td	`2201 // Gather load, vector + imm, 32-bit element size 2205 // Gather load, vector + imm, 64-bit element size 2209 // Gather load, 64-bit element size 2216 // Gather load, 32-bit scaled offset 2221 // Gather load, 32-bit unpacked unscaled offset`
H A D	AArch64SchedNeoverseV2.td	`2695 // Gather load, vector + imm, 32-bit element size 2699 // Gather load, vector + imm, 64-bit element size 2703 // Gather load, 32-bit scaled offset 2708 // Gather load, 64-bit scaled offset 2714 // Gather load, 32-bit unpacked unscaled offset 2718 // Gather load, 64-bit unpacked unscaled offset`
H A D	AArch64SchedNeoverseV1.td	`1885 // Gather load, vector + imm, 32-bit element size 1889 // Gather load, vector + imm, 64-bit element size 1896 // Gather load, 32-bit scaled offset 1901 // Gather load, 32-bit unpacked unscaled offset`
H A D	AArch64SchedNeoverseN3.td	`2178 // Gather load, vector + imm, 32-bit element size 2182 // Gather load, vector + imm, 64-bit element size 2186 // Gather load, 64-bit element size 2193 // Gather load, 32-bit element size`
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVISelLowering.cpp	3742 SDValue Gather = DAG.getNode(RISCVISD::VRGATHER_VX_VL, DL, ContainerVT, Src, in matchSplatAsGather() local 3745 Gather = convertFromScalableVector(VT, Gather, DAG, Subtarget); in matchSplatAsGather() 3746 return Gather; in matchSplatAsGather() 4324 if (auto Gather = matchSplatAsGather(Splat, VT, DL, DAG, Subtarget)) in lowerBUILD_VECTOR() local 4325 return Gather; in lowerBUILD_VECTOR() 5793 SDValue Gather = DAG.getNode(RISCVISD::VRGATHER_VX_VL, DL, ContainerVT, in lowerVECTOR_SHUFFLE() local 5796 return convertFromScalableVector(VT, Gather, DAG, Subtarget); in lowerVECTOR_SHUFFLE() 6193 SDValue Gather = DAG.getNode(GatherVVOpc, DL, ContainerVT, V1, LHSIndices, in lowerVECTOR_SHUFFLE() local 6195 return convertFromScalableVector(VT, Gather, DAG, Subtarget); in lowerVECTOR_SHUFFLE() 6211 SDValue Gather = DAG.getUNDEF(ContainerVT); in lowerVECTOR_SHUFFLE() local [all …]
H A D	RISCVScheduleV.td	`525 // 16.4. Vector Register Gather Instructions 753 // 16.4. Vector Register Gather Instructions`
H A D	RISCVSchedSiFiveP800.td	`737 // Simple Gather and Compress 756 // Complex Gather and Compress`
H A D	RISCVSchedSiFiveP400.td	`794 // Simple Gather and Compress 813 // Complex Gather and Compress`
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A D	VVPInstrPatternsVec.td	`97 // Vector Gather and scatter`
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A D	SLPVectorizer.cpp	1777 Gather, enumerator 6113 return LoadsState::Gather; in canVectorizeLoads() 6117 return LoadsState::Gather; in canVectorizeLoads() 6128 return LoadsState::Gather; in canVectorizeLoads() 6148 return LoadsState::Gather; in canVectorizeLoads() 6153 return LoadsState::Gather; in canVectorizeLoads() 6192 return LoadsState::Gather; in canVectorizeLoads() 6275 if (LS == LoadsState::Gather) { in canVectorizeLoads() 6366 case LoadsState::Gather: in canVectorizeLoads() 6414 return LoadsState::Gather; in canVectorizeLoads() [all …]