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Searched refs:GRLenVT (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp45 MVT GRLenVT = Subtarget->getGRLenVT(); in INITIALIZE_PASS() local
54 if (Imm == 0 && VT == GRLenVT) { in INITIALIZE_PASS()
56 LoongArch::R0, GRLenVT); in INITIALIZE_PASS()
61 SDValue SrcReg = CurDAG->getRegister(LoongArch::R0, GRLenVT); in INITIALIZE_PASS()
64 SDValue SDImm = CurDAG->getTargetConstant(Inst.Imm, DL, GRLenVT); in INITIALIZE_PASS()
66 Result = CurDAG->getMachineNode(LoongArch::LU12I_W, DL, GRLenVT, SDImm); in INITIALIZE_PASS()
68 Result = CurDAG->getMachineNode(Inst.Opc, DL, GRLenVT, SrcReg, SDImm); in INITIALIZE_PASS()
76 SDValue Imm = CurDAG->getTargetConstant(0, DL, GRLenVT); in INITIALIZE_PASS()
H A DLoongArchInstrInfo.td24 def SDT_LoongArchCall : SDTypeProfile<0, -1, [SDTCisVT<0, GRLenVT>]>;
39 def SDT_LoongArchVI : SDTypeProfile<0, 1, [SDTCisVT<0, GRLenVT>]>;
42 SDTCisVT<1, GRLenVT>]>;
44 SDTCisVT<2, GRLenVT>]>;
48 SDTCisVT<3, GRLenVT>]>;
51 def SDT_LoongArchMovgr2fcsr : SDTypeProfile<0, 2, [SDTCisVT<0, GRLenVT>,
53 def SDT_LoongArchMovfcsr2gr : SDTypeProfile<1, 1, [SDTCisVT<0, GRLenVT>,
219 def grlenimm : Operand<GRLenVT>;
220 def imm32 : Operand<GRLenVT> {
227 def uimm1 : Operand<GRLenVT>, ImmLeaf<GRLenVT, [{return isUInt<1>(Imm);}]>{
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H A DLoongArchISelLowering.cpp49 MVT GRLenVT = Subtarget.getGRLenVT(); in LoongArchTargetLowering() local
53 addRegisterClass(GRLenVT, &LoongArch::GPRRegClass); in LoongArchTargetLowering()
74 setLoadExtAction({ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}, GRLenVT, in LoongArchTargetLowering()
77 setOperationAction(ISD::SHL_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
78 setOperationAction(ISD::SRA_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
79 setOperationAction(ISD::SRL_PARTS, GRLenVT, Custom); in LoongArchTargetLowering()
80 setOperationAction(ISD::FP_TO_SINT, GRLenVT, Custom); in LoongArchTargetLowering()
81 setOperationAction(ISD::ROTL, GRLenVT, Expand); in LoongArchTargetLowering()
82 setOperationAction(ISD::CTPOP, GRLenVT, Expand); in LoongArchTargetLowering()
86 GRLenVT, Custom); in LoongArchTargetLowering()
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H A DLoongArchSubtarget.h44 MVT GRLenVT = MVT::i32; variable
95 MVT getGRLenVT() const { return GRLenVT; } in getGRLenVT()
H A DLoongArchRegisterInfo.td94 def GRLenVT : ValueTypeByHwMode<[LA32, LA64],
102 def GPR : RegisterClass<"LoongArch", [GRLenVT], 32, (add
120 def GPRT : RegisterClass<"LoongArch", [GRLenVT], 32, (add
178 def CFR : RegisterClass<"LoongArch", [GRLenVT], 32, (sequence "FCC%u", 0, 7)> {
216 def SCR : RegisterClass<"LoongArch", [GRLenVT], 32, (sequence "SCR%u", 0, 3)>;
H A DLoongArchSubtarget.cpp40 GRLenVT = MVT::i64; in initializeSubtargetDependencies()
H A DLoongArchFloat32InstrInfo.td205 def : Pat<(brcond (xor (GRLenVT (setcc RegTy:$fj, RegTy:$fk, cc)), -1),
208 def : Pat<(brcond (GRLenVT (setcc RegTy:$fj, RegTy:$fk, cc)), bb:$imm21),
250 : Pat<(select (GRLenVT (setcc RegTy:$a, RegTy:$b, cc)), RegTy:$t, RegTy:$f),
H A DLoongArchLASXInstrInfo.td1542 def : Pat<(vector_insert v32i8:$xd, GRLenVT:$rj, uimm5:$imm),
1543 (PseudoXVINSGR2VR_B v32i8:$xd, GRLenVT:$rj, uimm5:$imm)>;
1544 def : Pat<(vector_insert v16i16:$xd, GRLenVT:$rj, uimm4:$imm),
1545 (PseudoXVINSGR2VR_H v16i16:$xd, GRLenVT:$rj, uimm4:$imm)>;
1548 def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm),
1549 (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>;
1550 def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm),
1551 (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>;
1571 def : Pat<(loongarch_vreplve v32i8:$xj, GRLenVT:$rk),
1572 (XVREPLVE_B v32i8:$xj, GRLenVT:$rk)>;
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H A DLoongArchLSXInstrInfo.td1664 def : Pat<(vector_insert v16i8:$vd, GRLenVT:$rj, uimm4:$imm),
1665 (VINSGR2VR_B v16i8:$vd, GRLenVT:$rj, uimm4:$imm)>;
1666 def : Pat<(vector_insert v8i16:$vd, GRLenVT:$rj, uimm3:$imm),
1667 (VINSGR2VR_H v8i16:$vd, GRLenVT:$rj, uimm3:$imm)>;
1668 def : Pat<(vector_insert v4i32:$vd, GRLenVT:$rj, uimm2:$imm),
1669 (VINSGR2VR_W v4i32:$vd, GRLenVT:$rj, uimm2:$imm)>;
1670 def : Pat<(vector_insert v2i64:$vd, GRLenVT:$rj, uimm1:$imm),
1671 (VINSGR2VR_D v2i64:$vd, GRLenVT:$rj, uimm1:$imm)>;
1700 def : Pat<(loongarch_vreplve v16i8:$vj, GRLenVT:$rk),
1701 (VREPLVE_B v16i8:$vj, GRLenVT:$rk)>;
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