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Searched refs:GPRArgRegs (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp603 auto GPRArgRegs = AArch64::getGPRArgRegs(); in saveVarArgRegisters() local
616 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters()
617 unsigned NumVariadicGPRArgRegs = GPRArgRegs.size() - FirstVariadicGPR + 1; in saveVarArgRegisters()
619 unsigned GPRSaveSize = 8 * (GPRArgRegs.size() - FirstVariadicGPR); in saveVarArgRegisters()
637 for (unsigned i = FirstVariadicGPR; i < GPRArgRegs.size(); ++i) { in saveVarArgRegisters()
640 Val, GPRArgRegs[i], in saveVarArgRegisters()
642 GPRArgRegs[i], MVT::i64, CCValAssign::Full)); in saveVarArgRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp67 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAAPCS() local
73 Reg = State.AllocateReg(GPRArgRegs); in f64AssignAAPCS()
H A DARMFastISel.cpp3127 static const MCPhysReg GPRArgRegs[] = { in fastLowerArguments() local
3134 MCRegister SrcReg = GPRArgRegs[ArgNo]; in fastLowerArguments()
H A DARMISelLowering.cpp160 static const MCPhysReg GPRArgRegs[] = { variable
3037 MCRegister Reg = State->AllocateReg(GPRArgRegs); in HandleByVal()
3044 Reg = State->AllocateReg(GPRArgRegs); in HandleByVal()
3057 while (State->AllocateReg(GPRArgRegs)) in HandleByVal()
3074 State->AllocateReg(GPRArgRegs); in HandleByVal()
4481 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs()
4482 RBegin = RBeginIdx == 4 ? (unsigned)ARM::R4 : GPRArgRegs[RBeginIdx]; in StoreByValRegs()
4612 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments()
4613 if (RegIdx != std::size(GPRArgRegs)) in LowerFormalArguments()
4614 ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]); in LowerFormalArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp34 static const MCPhysReg GPRArgRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3}; variable
371 ArrayRef<MCPhysReg> ArgRegs = ArrayRef(GPRArgRegs); in LowerFormalArguments()
733 assert(VA.getLocReg() == GPRArgRegs[0] && "Unexpected reg assignment"); in LowerCall()
735 DAG.getCopyFromReg(Chain, DL, GPRArgRegs[1], MVT::i32, Glue); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp167 static const MCPhysReg GPRArgRegs[] = {AArch64::X0, AArch64::X1, AArch64::X2, variable
174 ArrayRef<MCPhysReg> llvm::AArch64::getGPRArgRegs() { return GPRArgRegs; } in getGPRArgRegs()
8227 auto GPRArgRegs = AArch64::getGPRArgRegs(); in saveVarArgRegisters() local
8228 unsigned NumGPRArgRegs = GPRArgRegs.size(); in saveVarArgRegisters()
8234 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters()
8262 Register VReg = MF.addLiveIn(GPRArgRegs[i], &AArch64::GPR64RegClass); in saveVarArgRegisters()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc24654 …&, llvm::DebugLoc, llvm::SelectionDAG&, llvm::SmallVectorImpl<llvm::SDValue>&) const::GPRArgRegs"},