Searched refs:GPRArgRegs (Results 1 – 6 of 6) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.cpp | 554 auto GPRArgRegs = AArch64::getGPRArgRegs(); in saveVarArgRegisters() local 567 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters() 568 unsigned NumVariadicGPRArgRegs = GPRArgRegs.size() - FirstVariadicGPR + 1; in saveVarArgRegisters() 570 unsigned GPRSaveSize = 8 * (GPRArgRegs.size() - FirstVariadicGPR); in saveVarArgRegisters() 588 for (unsigned i = FirstVariadicGPR; i < GPRArgRegs.size(); ++i) { in saveVarArgRegisters() 591 Val, GPRArgRegs[i], in saveVarArgRegisters() 593 GPRArgRegs[i], MVT::i64, CCValAssign::Full)); in saveVarArgRegisters()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 68 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAAPCS() local 74 Reg = State.AllocateReg(GPRArgRegs); in f64AssignAAPCS()
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H A D | ARMFastISel.cpp | 3057 static const MCPhysReg GPRArgRegs[] = { in fastLowerArguments() local 3064 unsigned SrcReg = GPRArgRegs[ArgNo]; in fastLowerArguments()
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H A D | ARMISelLowering.cpp | 155 static const MCPhysReg GPRArgRegs[] = { variable 2917 unsigned Reg = State->AllocateReg(GPRArgRegs); in HandleByVal() 2924 Reg = State->AllocateReg(GPRArgRegs); in HandleByVal() 2937 while (State->AllocateReg(GPRArgRegs)) in HandleByVal() 2954 State->AllocateReg(GPRArgRegs); in HandleByVal() 4411 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs() 4412 RBegin = RBeginIdx == 4 ? (unsigned)ARM::R4 : GPRArgRegs[RBeginIdx]; in StoreByValRegs() 4542 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments() 4543 if (RegIdx != std::size(GPRArgRegs)) in LowerFormalArguments() 4544 ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]); in LowerFormalArguments()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYISelLowering.cpp | 34 static const MCPhysReg GPRArgRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3}; variable 371 ArrayRef<MCPhysReg> ArgRegs = ArrayRef(GPRArgRegs); in LowerFormalArguments() 732 assert(VA.getLocReg() == GPRArgRegs[0] && "Unexpected reg assignment"); in LowerCall() 734 DAG.getCopyFromReg(Chain, DL, GPRArgRegs[1], MVT::i32, Glue); in LowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 161 static const MCPhysReg GPRArgRegs[] = {AArch64::X0, AArch64::X1, AArch64::X2, variable 168 ArrayRef<MCPhysReg> llvm::AArch64::getGPRArgRegs() { return GPRArgRegs; } in getGPRArgRegs() 7722 auto GPRArgRegs = AArch64::getGPRArgRegs(); in saveVarArgRegisters() local 7723 unsigned NumGPRArgRegs = GPRArgRegs.size(); in saveVarArgRegisters() 7729 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters() 7757 Register VReg = MF.addLiveIn(GPRArgRegs[i], &AArch64::GPR64RegClass); in saveVarArgRegisters()
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