Searched refs:GPHY_CFG_SEL_ANA_RESET (Results 1 – 2 of 2) sorted by relevance
907 CSR_WRITE_2(sc, ALC_GPHY_CFG, GPHY_CFG_SEL_ANA_RESET); in alc_phy_reset_813x()912 GPHY_CFG_SEL_ANA_RESET); in alc_phy_reset_813x()1024 val |= GPHY_CFG_SEL_ANA_RESET; in alc_phy_reset_816x()1026 val |= GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN | GPHY_CFG_SEL_ANA_RESET; in alc_phy_reset_816x()1105 GPHY_CFG_SEL_ANA_RESET; in alc_phy_down()1130 GPHY_CFG_SEL_ANA_RESET | GPHY_CFG_PHY_IDDQ | in alc_phy_down()2598 gphy |= GPHY_CFG_HIB_EN | GPHY_CFG_HIB_PULSE | GPHY_CFG_SEL_ANA_RESET; in alc_setwol_816x()
237 #define GPHY_CFG_SEL_ANA_RESET 0x1000 macro