Searched refs:GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT (Results 1 – 2 of 2) sorted by relevance
226 #define GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT 18 macro227 #define GMAC_DMA_CHAN0_CONTROL_DSL_MASK (0x7U << GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT)
510 val |= ((DESC_ALIGN - 16) / 8) << GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT; in eqos_init()