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Searched refs:GLC (Results 1 – 14 of 14) sorted by relevance

/freebsd/sys/contrib/ck/include/
H A Dck_cohort.h53 #define CK_COHORT_TRYLOCK(N, C, GLC, LLC, LUC) ck_cohort_##N##_trylock(C, GLC, LLC, LUC) argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h380 GLC = 1, enumerator
384 SC0 = GLC,
387 ALL_pregfx12 = GLC | SLC | DLC | SCC,
408 TH_ATOMIC_RETURN = GLC, // Returning vs non-returning
H A DSIInstrFormats.td306 int GLC = 0;
352 let Inst{13} = cpol{CPolBit.GLC};
425 let Inst{14} = cpol{CPolBit.GLC};
H A DSMInstructions.td548 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ?);
679 let cpol{CPolBit.GLC} = ps.glc;
1175 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ?);
1260 let cpol{CPolBit.GLC} = ps.glc;
1361 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, 0);
H A DBUFInstructions.td2346 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2360 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2895 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3047 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3161 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3313 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3368 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
H A DAMDGPULowerBufferFatPointers.cpp1084 Aux |= AMDGPU::CPol::GLC; in handleMemoryInst()
1088 Aux |= (Aux & AMDGPU::CPol::GLC ? AMDGPU::CPol::DLC : 0); in handleMemoryInst()
H A DSIInstrInfo.td892 return CurDAG->getTargetConstant(cpol | AMDGPU::CPol::GLC, SDLoc(N), MVT::i8);
1089 def CPol_GLC : ValuePredicatedOperand<CPol, "Op.getImm() & CPol::GLC">;
1090 def CPol_NonGLC : ValuePredicatedOperand<CPol, "!(Op.getImm() & CPol::GLC)", 1>;
1091 def CPol_GLC_WithDefault : DefaultOperand<CPol_GLC, !shl(1, CPolBit.GLC)>;
H A DSIMemoryLegalizer.cpp377 return enableNamedBit(MI, AMDGPU::CPol::GLC); in enableGLCBit()
H A DFLATInstructions.td136 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
2352 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
H A DAMDGPUInstructionSelector.cpp1898 CPol |= AMDGPU::CPol::GLC; // TODO no-return optimization in selectImageIntrinsic()
5691 MIB.addImm(Cpol | AMDGPU::CPol::GLC); in renderExtractCpolSetGLC()
H A DSIISelLowering.cpp8168 CPol |= AMDGPU::CPol::GLC; // TODO no-return optimization in lowerImage()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp195 if (Imm & CPol::GLC) in printCPol()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4923 if (CPol & ~(AMDGPU::CPol::GLC | AMDGPU::CPol::DLC)) { in validateCoherencyBits()
4947 if (!(TSFlags & SIInstrFlags::MIMG) && !(CPol & CPol::GLC)) { in validateCoherencyBits()
4953 if (CPol & CPol::GLC) { in validateCoherencyBits()
6523 .Case("glc", AMDGPU::CPol::GLC) in getCPolKind()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp656 AMDGPU::CPol::GLC : 0; in getInstruction()