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Searched refs:GLC (Results 1 – 14 of 14) sorted by relevance

/freebsd/sys/contrib/ck/include/
H A Dck_cohort.h53 #define CK_COHORT_TRYLOCK(N, C, GLC, LLC, LUC) ck_cohort_##N##_trylock(C, GLC, LLC, LUC) argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h362 GLC = 1, enumerator
366 SC0 = GLC,
369 ALL_pregfx12 = GLC | SLC | DLC | SCC,
390 TH_ATOMIC_RETURN = GLC, // Returning vs non-returning
H A DSIInstrFormats.td316 int GLC = 0;
368 let Inst{13} = cpol{CPolBit.GLC};
441 let Inst{14} = cpol{CPolBit.GLC};
H A DSMInstructions.td552 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ?);
683 let cpol{CPolBit.GLC} = ps.glc;
1212 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ?);
1297 let cpol{CPolBit.GLC} = ps.glc;
1398 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, 0);
H A DBUFInstructions.td2340 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2354 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2882 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3034 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3148 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3302 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
3357 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
H A DSIInstrInfo.td1010 return CurDAG->getTargetConstant(cpol | AMDGPU::CPol::GLC, SDLoc(N), MVT::i8);
1218 def CPol_GLC : ValuePredicatedOperand<CPol, "Op.getImm() & CPol::GLC">;
1219 def CPol_NonGLC : ValuePredicatedOperand<CPol, "!(Op.getImm() & CPol::GLC)", 1>;
1220 def CPol_GLC_WithDefault : DefaultOperand<CPol_GLC, !shl(1, CPolBit.GLC)>;
H A DSIMemoryLegalizer.cpp372 return enableNamedBit(MI, AMDGPU::CPol::GLC); in enableGLCBit()
H A DFLATInstructions.td145 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
2621 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
H A DAMDGPUInstructionSelector.cpp2127 CPol |= AMDGPU::CPol::GLC; // TODO no-return optimization in selectImageIntrinsic()
6757 MIB.addImm(Cpol | AMDGPU::CPol::GLC); in renderExtractCpolSetGLC()
H A DSIISelLowering.cpp8731 CPol |= AMDGPU::CPol::GLC; // TODO no-return optimization in lowerImage()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp166 if (Imm & CPol::GLC) in printCPol()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp5293 if (CPol & ~(AMDGPU::CPol::GLC | AMDGPU::CPol::DLC)) { in validateCoherencyBits()
5317 if (!(TSFlags & SIInstrFlags::MIMG) && !(CPol & CPol::GLC)) { in validateCoherencyBits()
5323 if (CPol & CPol::GLC) { in validateCoherencyBits()
6906 .Case("glc", AMDGPU::CPol::GLC) in getCPolKind()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp808 AMDGPU::CPol::GLC : 0; in getInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SchedLunarlakeP.td80 let BufferSize = 110; // Reduced from 128 in GLC