Searched refs:GICR_ISENABLER0 (Results 1 – 3 of 3) sorted by relevance
254 #define GICR_ISENABLER0 (0x0100) macro
1496 gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICR_ISENABLER0, in gic_v3_redist_init()
396 VGIC_REGISTER(GICR_ISENABLER0, 4, VGIC_32_BIT, redist_ienabler0_read,