Searched refs:GICD_ITARGETSR (Results 1 – 3 of 3) sorted by relevance
95 #define GICD_ITARGETSR(n) (0x0800 + (((n) >> 2) * 4)) /* v1 ICDIPTR */ macro
186 mask = gic_d_read_4(sc, GICD_ITARGETSR(4 * i)); in gic_cpu_mask()379 gic_d_write_4(sc, GICD_ITARGETSR(i), mask); in arm_gic_attach()667 gic_d_write_1(sc, GICD_ITARGETSR(0) + irq, mask); in gic_bind()1201 (gic_d_read_4(sc, GICD_ITARGETSR(i)) >> 8 * (i & 0x3)) & in arm_gic_db_show()
296 VGIC_REGISTER_RANGE_RAZ_WI(GICD_ITARGETSR(0), GICD_ITARGETSR(1024), 4,