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Searched refs:GFX940 (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DCuda.h104 GFX940, enumerator
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DNVPTX.cpp208 case OffloadArch::GFX940: in getTargetDefines()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h45 GFX940 = 9, enumerator
H A DVOP3PInstructions.td1631 DecoderNamespace = "GFX940",
1633 def _gfx940_acd : VOP3P_Real<PS_ACD, SIEncodingFamily.GFX940>,
1636 def _gfx940_vcd : VOP3P_Real<PS_VCD, SIEncodingFamily.GFX940>,
1638 } // End AssemblerPredicate = isGFX940Plus, DecoderNamespace = "GFX940"
H A DSIInstrInfo.td31 int GFX940 = 9;
2791 [!cast<string>(SIEncodingFamily.GFX940)],
H A DFLATInstructions.td803 // GFX940-, GFX11-only flat instructions.
1843 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.GFX940> {
H A DAMDGPU.td360 "Additional instructions for GFX940+"
H A DDSInstructions.td1745 // GFX940+.
H A DVOP2Instructions.td2216 def _gfx940 : VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.GFX940>,
H A DBUFInstructions.td3084 MUBUF_Real_Base_vi<op, ps, SIEncodingFamily.GFX940> {
H A DSIInstrInfo.cpp9270 NMCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX940); in pseudoToMCOpcode()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGOpenMPRuntimeGPU.cpp2303 case OffloadArch::GFX940: in processRequiresDirective()