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Searched refs:GFX90A (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h44 GFX90A = 8, enumerator
H A DVOP2Instructions.td2476 let AssemblerPredicate = isGFX90APlus, DecoderNamespace = "GFX90A" in {
2479 VOP2_Real<!cast<VOP2_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX90A>,
2485 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX90A>,
2498 VOP_DPP_Real<!cast<VOP2_DPP_Pseudo>(NAME#"_dpp"), SIEncodingFamily.GFX90A>,
2503 } // End AssemblerPredicate = isGFX90APlus, DecoderNamespace = "GFX90A"
H A DBUFInstructions.td154 // GFX90A+ only: instruction uses AccVGPR for data
366 // GFX90A+ only: instruction uses AccVGPR for data
3073 def _gfx90a : MUBUF_Real_Base_vi<op, ps, SIEncodingFamily.GFX90A, has_sccb> {
3075 let DecoderNamespace = "GFX90A";
3336 MTBUF_Real_Base_vi <op, ps, SIEncodingFamily.GFX90A> {
3338 let DecoderNamespace = "GFX90A";
H A DMIMGInstructions.td555 !if(enableDisasm, "GFX90A", "")>;
782 !if(enableDisasm, "GFX90A", "")>;
914 : MIMG_Atomic_gfx90a_base<op.VI, asm, data_rc, addr_rc, !if(enableDasm, "GFX90A", "")> {
1368 !if(!and(enableDisasm, addr.Disassemble), "GFX90A", "")>;
H A DVOP3PInstructions.td1600 AssemblerPredicate = isGFX90AOnly, DecoderNamespace = "GFX90A" in {
1601 def _gfx90a_acd : VOP3P_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX90A>,
1604 …f _gfx90a_vcd : VOP3P_Real<!cast<VOP3_Pseudo>(NAME # "_vgprcd" # "_e64"), SIEncodingFamily.GFX90A>,
1606 } // End AssemblerPredicate = isGFX90AOnly, DecoderNamespace = "GFX90A"
H A DSIInstrInfo.td30 int GFX90A = 8;
2790 [!cast<string>(SIEncodingFamily.GFX90A)],
H A DFLATInstructions.td125 // GFX90A+ only: instruction uses AccVGPR for data
145 let Inst{55} = acc; // nv on GFX9+, TFE before. AccVGPR for data on GFX90A.
H A DAMDGPU.td353 "Additional instructions for GFX90A+"
H A DDSInstructions.td1741 // GFX90A+.
H A DSIInstrInfo.cpp9272 NMCOp = AMDGPU::getMCOpcode(Opcode, SIEncodingFamily::GFX90A); in pseudoToMCOpcode()