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Searched refs:GFX11 (Results 1 – 25 of 37) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSubtarget.h328 if (getGeneration() == GFX11) { in getMaxWaveScratchSize()
938 return getGeneration() == GFX10 || getGeneration() == GFX11; in hasInstPrefetch()
1021 bool hasPermLane64() const { return getGeneration() >= GFX11; } in hasPermLane64()
1232 bool hasVOP3DPP() const { return getGeneration() >= GFX11; } in hasVOP3DPP()
1234 bool hasLdsDirect() const { return getGeneration() >= GFX11; } in hasLdsDirect()
1239 return getGeneration() == GFX11; in hasVALUPartialForwardingHazard()
1248 bool hasVALUMaskWriteHazard() const { return getGeneration() == GFX11; } in hasVALUMaskWriteHazard()
1268 bool hasFlatScratchSVSSwizzleBug() const { return getGeneration() == GFX11; } in hasFlatScratchSVSSwizzleBug()
1347 bool hasLegacyGeometry() const { return getGeneration() < GFX11; } in hasLegacyGeometry()
1575 bool shouldClusterStores() const { return getGeneration() >= GFX11; } in shouldClusterStores()
H A DLDSDIRInstructions.td
H A DDSDIRInstructions.td162 // GFX11
169 SIEncodingFamily.GFX11>,
172 let DecoderNamespace = "GFX11";
H A DEXPInstructions.td104 // GFX11, GFX12.
109 def _gfx11 : EXP_Real_Row<ps, SIEncodingFamily.GFX11>, EXPe_Row {
111 let DecoderNamespace = "GFX11";
H A DMIMGInstructions.td103 field bits<8> GFX11 = gfx11;
474 : MIMG_gfx11<op.GFX11, (outs DataRC:$vdata), dns> {
486 : MIMG_nsa_gfx11<op.GFX11, (outs DataRC:$vdata), num_addrs, dns> {
561 !if(enableDisasm, "GFX11", "")>;
636 !if(enableDisasm, "GFX11", "")>;
734 : MIMG_gfx11<op.GFX11, (outs), dns> {
746 : MIMG_nsa_gfx11<op.GFX11, (outs), num_addrs, dns> {
788 !if(enableDisasm, "GFX11", "")>;
842 !if(enableDisasm, "GFX11", "")>;
950 : MIMG_gfx11<!cast<int>(op.GFX11), (outs DataRC:$vdst),
[all …]
H A DVINTERPInstructions.td188 let AssemblerPredicate = isGFX11Only, DecoderNamespace = "GFX11" in {
190 VINTERP_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.GFX11>,
H A DVOPDInstructions.td
H A DAMDGPUSubtarget.h42 GFX11 = 10, enumerator
H A DAMDGPUAsmPrinter.cpp1016 STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 8 : 10; in getSIProgramInfo()
1154 } else if (STM.getGeneration() == AMDGPUSubtarget::GFX11) { in EmitProgramInfoSI()
1182 } else if (STM.getGeneration() == AMDGPUSubtarget::GFX11) { in EmitProgramInfoSI()
1195 unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11 in EmitProgramInfoSI()
1280 unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11 in EmitPALMetadata()
1293 STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 256 : 128; in EmitPALMetadata()
H A DAMDGPU.td372 "Additional instructions for GFX11+"
953 "Export priority must be explicitly manipulated on GFX11.5"
1210 def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
1579 // a bit on the generic GFX11 target.
1800 "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1833 Predicate<"Subtarget->getGeneration() <= AMDGPUSubtarget::GFX11">,
1847 "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1924 "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1944 Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1948 Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
H A DSIInsertHardClauses.cpp118 assert(ST->getGeneration() >= AMDGPUSubtarget::GFX11); in getHardClauseType()
H A DDSInstructions.td708 // Instruction definitions for GFX11.
1186 // Base ENC_DS for GFX6, GFX7, GFX10, GFX11, GFX12.
1249 // GFX11.
1255 let DecoderNamespace = "GFX11" in
1257 Base_DS_Real_gfx6_gfx7_gfx10_gfx11_gfx12<op, ps, SIEncodingFamily.GFX11,
1306 // DS_CMPST_* are renamed to DS_CMPSTORE_* in GFX11, but also the data operands (src and cmp) are s…
1307 // comparing to pre-GFX11.
1348 // GFX10, GFX11, GFX12.
1363 // GFX7, GFX10, GFX11, GFX12.
1392 // GFX6, GFX7, GFX10, GFX11.
H A DGCNProcessors.td271 // GCN GFX11.
H A DSIInstrFormats.td509 // Pre-GFX11 encoding has compr and vm bits.
518 // GFX11+ encoding has row bit.
H A DBUFInstructions.td2326 // Base ENC_MUBUF for GFX6, GFX7, GFX10, GFX11.
2342 def _gfx11 : Base_MUBUF_Real_gfx6_gfx7_gfx10_gfx11<ps, SIEncodingFamily.GFX11, real_name> {
2344 // In GFX11 dlc is applicable to all loads/stores/atomics.
2352 let DecoderNamespace = "GFX11";
2497 // MUBUF - GFX11, GFX12.
2888 // Base ENC_MTBUF for GFX6, GFX7, GFX10, GFX11.
2905 def _gfx11 : Base_MTBUF_Real_gfx6_gfx7_gfx10_gfx11<ps, SIEncodingFamily.GFX11, real_name> {
2914 let DecoderNamespace = "GFX11";
2928 // MTBUF - GFX11.
H A DSIDefines.h46 GFX11 = 10, enumerator
H A DSOPInstructions.td1985 // SOP1 - GFX11, GFX12
2155 // SOP1 - GFX6, GFX7, GFX10, GFX11.
2241 // SOP2 - GFX11, GFX12.
2431 // SOPK - GFX11, GFX12.
2588 // SOPP - GFX11, GFX12.
2799 // SOPC - GFX11, GFX12.
H A DAMDGPUSearchableTables.td189 // Buffer formats with equal component sizes (GFX11 and later)
H A DVOP1Instructions.td807 // GFX11, GFX12
1077 // GFX7, GFX10, GFX11, GFX12
1109 // GFX6, GFX7, GFX10, GFX11, GFX12
H A DSMInstructions.td1352 // GFX11.
1356 SMEM_Real_10Plus_common<op, ps, opName, SIEncodingFamily.GFX11,
1359 let DecoderNamespace = "GFX11";
H A DFLATInstructions.td789 // GFX7-, GFX10-, GFX11-only flat instructions.
803 // GFX940-, GFX11-only flat instructions.
2336 // GFX11
2347 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.GFX11> {
2349 let DecoderNamespace = "GFX11";
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsAMDGPU.def301 // GFX11+ only builtins.
466 // Some of these are very similar to their GFX11 counterparts, but they don't
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td1703 llvm_i1_ty // vm (ignored on GFX11+)
1709 // exp with row_en bit set. Only supported on GFX11+.
1723 // exp with compr bit set. Not supported on GFX11+.
2438 // GFX11 Intrinsics
2498 llvm_i1_ty, // %high (op_sel) for GFX11, 0 for GFX12
2534 // GFX11: The OPSEL intrinsics read from and write to one half of the registers, selected by the op…
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUTargetStreamer.cpp788 Version = GenericVersion::GFX11; in getEFlagsV6()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h51 static constexpr unsigned GFX11 = 1; variable

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