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Searched refs:FirstOp (Results 1 – 18 of 18) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegacyLegalizerInfo.h158 const unsigned OpcodeIdx = Aspect.Opcode - FirstOp; in setAction()
183 const unsigned OpcodeIdx = Opcode - FirstOp; in setLegalizeScalarToDifferentSizeStrategy()
194 const unsigned OpcodeIdx = Opcode - FirstOp; in setLegalizeVectorElementToDifferentSizeStrategy()
313 const unsigned OpcodeIdx = Opcode - FirstOp; in setScalarAction()
320 const unsigned OpcodeIdx = Opcode - FirstOp; in setPointerAction()
336 unsigned OpcodeIdx = Opcode - FirstOp; in setScalarInVectorAction()
349 const unsigned OpcodeIdx = Opcode - FirstOp; in setVectorNumElementAction()
449 static const int FirstOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START; variable
454 SmallVector<TypeMap, 1> SpecifiedActions[LastOp - FirstOp + 1];
456 ScalarSizeChangeStrategies[LastOp - FirstOp + 1];
[all …]
H A DLegalizerInfo.h1331 static const int FirstOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START;
1334 LegalizeRuleSet RulesForOpcode[LastOp - FirstOp + 1];
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ConditionalCompares.cpp650 unsigned FirstOp = 1; // First CmpMI operand to copy. in convert() local
663 case AArch64::FCMPSrr: Opc = AArch64::FCCMPSrr; FirstOp = 0; break; in convert()
664 case AArch64::FCMPDrr: Opc = AArch64::FCCMPDrr; FirstOp = 0; break; in convert()
665 case AArch64::FCMPESrr: Opc = AArch64::FCCMPESrr; FirstOp = 0; break; in convert()
666 case AArch64::FCMPEDrr: Opc = AArch64::FCCMPEDrr; FirstOp = 0; break; in convert()
670 FirstOp = 0; in convert()
676 FirstOp = 0; in convert()
688 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(), in convert()
690 if (CmpMI->getOperand(FirstOp + 1).isReg()) in convert()
691 MRI->constrainRegClass(CmpMI->getOperand(FirstOp + 1).getReg(), in convert()
[all …]
H A DAArch64ISelLowering.cpp13698 SDValue FirstOp = N->getOperand(0); in tryLowerToSLI() local
13699 unsigned FirstOpc = FirstOp.getOpcode(); in tryLowerToSLI()
13712 And = FirstOp; in tryLowerToSLI()
13720 Shift = FirstOp; in tryLowerToSLI()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegacyLegalizerInfo.cpp108 for (unsigned OpcodeIdx = 0; OpcodeIdx <= LastOp - FirstOp; ++OpcodeIdx) { in computeTables()
109 const unsigned Opcode = FirstOp + OpcodeIdx; in computeTables()
305 if (Aspect.Opcode < FirstOp || Aspect.Opcode > LastOp) in findScalarLegalAction()
336 if (Aspect.Opcode < FirstOp || Aspect.Opcode > LastOp) in findVectorLegalAction()
367 assert(Opcode >= FirstOp && Opcode <= LastOp && "Unsupported opcode");
368 return Opcode - FirstOp;
H A DLegalizerInfo.cpp270 assert(Opcode >= FirstOp && Opcode <= LastOp && "Unsupported opcode"); in getOpcodeIdxForOpcode()
271 return Opcode - FirstOp; in getOpcodeIdxForOpcode()
317 assert(OpcodeTo >= FirstOp && OpcodeTo <= LastOp && "Unsupported opcode"); in aliasActionDefinitions()
383 for (unsigned Opcode = FirstOp; Opcode <= LastOp; ++Opcode) { in verify()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstr.cpp1765 bool FirstOp = true; in print() local
1797 FirstOp = false; in print()
1803 if (FirstOp) FirstOp = false; else OS << ","; in print()
1877 if (!FirstOp) { in print()
1878 FirstOp = false; in print()
1885 if (!FirstOp) { in print()
1886 FirstOp = false; in print()
1893 if (!FirstOp) { in print()
1894 FirstOp = false; in print()
1901 if (!FirstOp) { in print()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombinePHI.cpp582 Value *FirstOp = FirstInst->getOperand(I); in foldPHIArgGEPIntoPHI() local
584 PHINode::Create(FirstOp->getType(), E, FirstOp->getName() + ".pn"); in foldPHIArgGEPIntoPHI()
587 NewPN->addIncoming(FirstOp, PN.getIncomingBlock(0)); in foldPHIArgGEPIntoPHI()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp1659 unsigned FirstOp = CurOp++; in encodeInstruction() local
1663 emitRegModRMByte(MI.getOperand(FirstOp), in encodeInstruction()
1758 unsigned FirstOp = CurOp++; in encodeInstruction() local
1765 getX86RegNum(MI.getOperand(FirstOp)), CB); in encodeInstruction()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DDebugInfoMetadata.cpp1470 auto FirstOp = expr_op_begin(); in isValid() local
1471 if (FirstOp->getOp() == dwarf::DW_OP_LLVM_arg && FirstOp->getArg(0) == 0) in isValid()
1472 ++FirstOp; in isValid()
1473 return I->get() == FirstOp->get() && I->getArg(0) == 1; in isValid()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DNewGVN.cpp1580 Value *FirstOp = lookupOperandLeader(CmpOp0); in performSymbolicPredicateInfoEvaluation() local
1585 if (shouldSwapOperandsForIntrinsic(FirstOp, SecondOp, I)) { in performSymbolicPredicateInfoEvaluation()
1586 std::swap(FirstOp, SecondOp); in performSymbolicPredicateInfoEvaluation()
1592 return ExprResult::some(createVariableOrConstant(FirstOp), in performSymbolicPredicateInfoEvaluation()
1596 if (Predicate == CmpInst::FCMP_OEQ && isa<ConstantFP>(FirstOp) && in performSymbolicPredicateInfoEvaluation()
1597 !cast<ConstantFP>(FirstOp)->isZero()) in performSymbolicPredicateInfoEvaluation()
1598 return ExprResult::some(createConstantExpression(cast<Constant>(FirstOp)), in performSymbolicPredicateInfoEvaluation()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp2344 MachineInstr *FirstOp = nullptr; in RescheduleOps() local
2378 FirstOp = Op; in RescheduleOps()
2400 DoMove = IsSafeAndProfitableToMove(isLd, Base, FirstOp, LastOp, in RescheduleOps()
2407 MachineBasicBlock::iterator InsertPos = isLd ? FirstOp : LastOp; in RescheduleOps()
H A DARMISelLowering.cpp7806 SDValue FirstOp = Op.getOperand(0); in LowerBUILD_VECTOR_i1() local
7807 if (!isa<ConstantSDNode>(FirstOp) && in LowerBUILD_VECTOR_i1()
7808 llvm::all_of(llvm::drop_begin(Op->ops()), [&FirstOp](const SDUse &U) { in LowerBUILD_VECTOR_i1()
7809 return U.get().isUndef() || U.get() == FirstOp; in LowerBUILD_VECTOR_i1()
7811 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, FirstOp, in LowerBUILD_VECTOR_i1()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp7706 unsigned FirstOp; in PeepholePPC64() local
7729 FirstOp = 0; in PeepholePPC64()
7745 FirstOp = 1; in PeepholePPC64()
7753 if (!isa<ConstantSDNode>(N->getOperand(FirstOp))) in PeepholePPC64()
7756 SDValue Base = N->getOperand(FirstOp + 1); in PeepholePPC64()
7814 int Offset = N->getConstantOperandVal(FirstOp); in PeepholePPC64()
7915 if (FirstOp == 1) // Store in PeepholePPC64()
H A DPPCISelLowering.cpp15420 SDValue FirstOp; in isSplatBV() local
15424 FirstOp = Op.getOperand(i); in isSplatBV()
15425 if (!FirstOp.isUndef()) in isSplatBV()
15431 if (Op.getOperand(i) != FirstOp && !Op.getOperand(i).isUndef()) in isSplatBV()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp829 MachineOperand FirstOp = MI.getOperand(0); in PredicateInstruction() local
837 .add(FirstOp) in PredicateInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2050 unsigned FirstOp = 1; in processInstruction() local
2073 FirstOp = 0; in processInstruction()
2088 if (Inst.getOperand(FirstOp).getReg() == Mips::ZERO || in processInstruction()
2089 Inst.getOperand(FirstOp).getReg() == Mips::ZERO_64) in processInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp5332 auto FirstOp = static_cast<Instruction::CastOps>(CI->getOpcode()); in simplifyCastInst() local
5340 if (CastInst::isEliminableCastPair(FirstOp, SecondOp, SrcTy, MidTy, DstTy, in simplifyCastInst()