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Searched refs:Features (Results 1 – 25 of 352) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DTargetParser.cpp74 unsigned Features; member
254 return Entry->Features; in getArchAttrAMDGCN()
260 return Entry->Features; in getArchAttrR600()
368 StringMap<bool> &Features) { in fillAMDGPUFeatureMap() argument
374 Features["16-bit-insts"] = true; in fillAMDGPUFeatureMap()
375 Features["ashr-pk-insts"] = true; in fillAMDGPUFeatureMap()
376 Features["atomic-buffer-pk-add-bf16-inst"] = true; in fillAMDGPUFeatureMap()
377 Features["atomic-buffer-global-pk-add-f16-insts"] = true; in fillAMDGPUFeatureMap()
378 Features["atomic-ds-pk-add-16-insts"] = true; in fillAMDGPUFeatureMap()
379 Features["atomic-fadd-rtn-insts"] = true; in fillAMDGPUFeatureMap()
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H A DHost.cpp705 #define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
709 const unsigned *Features, in getIntelProcessorTypeAndSubtype() argument
1110 const unsigned *Features, in getAMDProcessorTypeAndSubtype() argument
1284 unsigned *Features) { in getAvailableFeatures() argument
1288 Features[F / 32] |= 1U << (F % 32); in getAvailableFeatures()
1427 unsigned Features[(X86::CPU_FEATURE_MAX + 31) / 32] = {0}; in getHostCPUName() local
1429 getAvailableFeatures(ECX, EDX, MaxLeaf, Features); in getHostCPUName()
1439 CPU = getIntelProcessorTypeAndSubtype(Family, Model, Features, &Type, in getHostCPUName()
1442 CPU = getAMDProcessorTypeAndSubtype(Family, Model, Features, &Type, in getHostCPUName()
1861 StringMap<bool> Features; in getHostCPUFeatures() local
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H A DCSKYTargetParser.cpp22 std::vector<StringRef> &Features) { in getFPUFeatures() argument
29 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
30 Features.push_back("+fpuv2_df"); in getFPUFeatures()
31 Features.push_back("+fdivdu"); in getFPUFeatures()
34 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
35 Features.push_back("+fpuv2_df"); in getFPUFeatures()
38 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
39 Features.push_back("+fpuv2_df"); in getFPUFeatures()
40 Features.push_back("+fdivdu"); in getFPUFeatures()
43 Features.push_back("+fpuv2_sf"); in getFPUFeatures()
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H A DLoongArchTargetParser.cpp51 std::vector<StringRef> &Features) { in getArchFeatures() argument
55 if ((A.Features & F.Kind) == F.Kind) in getArchFeatures()
56 Features.push_back(F.Name); in getArchFeatures()
62 Features.push_back("+64bit"); in getArchFeatures()
63 Features.push_back("+d"); in getArchFeatures()
64 Features.push_back("+lsx"); in getArchFeatures()
65 Features.push_back("+ual"); in getArchFeatures()
67 Features.push_back("+frecipe"); in getArchFeatures()
68 Features.push_back("+lam-bh"); in getArchFeatures()
69 Features.push_back("+lamcas"); in getArchFeatures()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNProcessors.td24 FeatureISAVersion6_0_0.Features
28 FeatureISAVersion6_0_0.Features
32 FeatureISAVersion6_0_1.Features
36 FeatureISAVersion6_0_1.Features
40 FeatureISAVersion6_0_1.Features
44 FeatureISAVersion6_0_2.Features
48 FeatureISAVersion6_0_2.Features
52 FeatureISAVersion6_0_2.Features
60 FeatureISAVersion7_0_0.Features
64 FeatureISAVersion7_0_0.Features
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/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DSparc.cpp144 std::vector<StringRef> &Features) { in getSparcTargetFeatures() argument
147 Features.push_back("+soft-float"); in getSparcTargetFeatures()
151 Features.push_back("+fsmuld"); in getSparcTargetFeatures()
153 Features.push_back("-fsmuld"); in getSparcTargetFeatures()
158 Features.push_back("+popc"); in getSparcTargetFeatures()
160 Features.push_back("-popc"); in getSparcTargetFeatures()
174 Features.push_back("+vis"); in getSparcTargetFeatures()
176 Features.push_back("-vis"); in getSparcTargetFeatures()
178 Features.push_back("+vis"); in getSparcTargetFeatures()
183 Features.push_back("+vis2"); in getSparcTargetFeatures()
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H A DLoongArch.cpp131 std::vector<StringRef> &Features) { in getLoongArchTargetFeatures() argument
135 Features.push_back("+lsx"); in getLoongArchTargetFeatures()
142 Features.push_back("+relax"); in getLoongArchTargetFeatures()
151 Features.push_back("-relax"); in getLoongArchTargetFeatures()
160 llvm::LoongArch::getArchFeatures(ArchName, Features); in getLoongArchTargetFeatures()
163 Features.push_back( in getLoongArchTargetFeatures()
173 Features.push_back("+f"); in getLoongArchTargetFeatures()
174 Features.push_back("+d"); in getLoongArchTargetFeatures()
176 Features.push_back("+f"); in getLoongArchTargetFeatures()
177 Features.push_back("-d"); in getLoongArchTargetFeatures()
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H A DAArch64.cpp139 llvm::AArch64::ExtensionSet &Extensions, std::vector<StringRef> &Features) { in getAArch64ArchFeaturesFromMcpu() argument
148 Features.push_back(Args.MakeArgString((Enabled ? "+" : "-") + Feature)); in getAArch64ArchFeaturesFromMcpu()
158 std::vector<StringRef> &Features) { in getAArch64MicroArchFeaturesFromMtune() argument
169 std::vector<StringRef> &Features) { in getAArch64MicroArchFeaturesFromMcpu() argument
170 return getAArch64MicroArchFeaturesFromMtune(D, Mcpu, Args, Features); in getAArch64MicroArchFeaturesFromMcpu()
176 std::vector<StringRef> &Features, in getAArch64TargetFeatures() argument
198 Features); in getAArch64TargetFeatures()
201 D, getAArch64TargetCPU(Args, Triple, A), Args, Extensions, Features); in getAArch64TargetFeatures()
208 getAArch64MicroArchFeaturesFromMtune(D, A->getValue(), Args, Features); in getAArch64TargetFeatures()
211 getAArch64MicroArchFeaturesFromMcpu(D, A->getValue(), Args, Features); in getAArch64TargetFeatures()
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H A DM68k.cpp65 std::vector<llvm::StringRef> &Features) { in addFloatABIFeatures() argument
70 Features.push_back("-isa-68881"); in addFloatABIFeatures()
71 Features.push_back("-isa-68882"); in addFloatABIFeatures()
80 Features.push_back("+isa-68881"); in addFloatABIFeatures()
86 Features.push_back("+isa-68882"); in addFloatABIFeatures()
91 std::vector<StringRef> &Features) { in getM68kTargetFeatures() argument
92 addFloatABIFeatures(Args, Features); in getM68kTargetFeatures()
96 Features.push_back("+reserve-a0"); in getM68kTargetFeatures()
98 Features.push_back("+reserve-a1"); in getM68kTargetFeatures()
100 Features.push_back("+reserve-a2"); in getM68kTargetFeatures()
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H A DX86.cpp119 std::vector<StringRef> &Features) { in getX86TargetFeatures() argument
134 Features.push_back( in getX86TargetFeatures()
142 Features.push_back("-rdrnd"); in getX86TargetFeatures()
143 Features.push_back("-aes"); in getX86TargetFeatures()
144 Features.push_back("-pclmul"); in getX86TargetFeatures()
145 Features.push_back("-rtm"); in getX86TargetFeatures()
146 Features.push_back("-fsgsbase"); in getX86TargetFeatures()
153 Features.push_back("+sse4.2"); in getX86TargetFeatures()
154 Features.push_back("+popcnt"); in getX86TargetFeatures()
155 Features.push_back("+cx16"); in getX86TargetFeatures()
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H A DARM.cpp101 std::vector<StringRef> &Features) { in getARMHWDivFeatures() argument
103 if (!llvm::ARM::getHWDivFeatures(HWDivID, Features)) in getARMHWDivFeatures()
110 std::vector<StringRef> &Features) { in getARMFPUFeatures() argument
112 if (!llvm::ARM::getFPUFeatures(FPUKind, Features)) in getARMFPUFeatures()
120 std::vector<StringRef> &Features, in DecodeARMFeatures() argument
126 if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUKind)) in DecodeARMFeatures()
133 std::vector<StringRef> &Features) { in DecodeARMFeaturesFromCPU() argument
138 llvm::ARM::getExtensionFeatures(Extension, Features); in DecodeARMFeaturesFromCPU()
147 std::vector<StringRef> &Features, in checkARMArchName() argument
156 !DecodeARMFeatures(D, Split.second, CPUName, ArchKind, Features, in checkARMArchName()
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H A DMips.cpp188 std::vector<StringRef> &Features) { in getMIPSTargetFeatures() argument
260 Features.push_back("+msa"); in getMIPSTargetFeatures()
264 Features.push_back("+noabicalls"); in getMIPSTargetFeatures()
266 Features.push_back("-noabicalls"); in getMIPSTargetFeatures()
271 Features.push_back("-long-calls"); in getMIPSTargetFeatures()
273 Features.push_back("+long-calls"); in getMIPSTargetFeatures()
280 Features.push_back("+xgot"); in getMIPSTargetFeatures()
282 Features.push_back("-xgot"); in getMIPSTargetFeatures()
290 Features.push_back("+soft-float"); in getMIPSTargetFeatures()
297 Features.push_back("+nan2008"); in getMIPSTargetFeatures()
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H A DRISCV.cpp27 std::vector<StringRef> &Features, in getArchFeatures() argument
44 Features.push_back(Args.MakeArgString(Str)); in getArchFeatures()
47 Features.push_back(Args.MakeArgString("+experimental")); in getArchFeatures()
56 std::vector<StringRef> &Features) { in getRISCFeaturesFromMcpu() argument
71 std::vector<StringRef> &Features) { in getRISCVTargetFeatures() argument
74 if (!getArchFeatures(D, MArch, Features, Args)) in getRISCVTargetFeatures()
87 getRISCFeaturesFromMcpu(D, A, Triple, CPU, Features); in getRISCVTargetFeatures()
98 Features.push_back("+reserve-" #REG); in getRISCVTargetFeatures()
135 Features.push_back("+relax"); in getRISCVTargetFeatures()
143 Features.push_back("-relax"); in getRISCVTargetFeatures()
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H A DSystemZ.cpp57 std::vector<llvm::StringRef> &Features) { in getSystemZTargetFeatures() argument
61 Features.push_back("+transactional-execution"); in getSystemZTargetFeatures()
63 Features.push_back("-transactional-execution"); in getSystemZTargetFeatures()
68 Features.push_back("+vector"); in getSystemZTargetFeatures()
70 Features.push_back("-vector"); in getSystemZTargetFeatures()
75 Features.push_back("+soft-float"); in getSystemZTargetFeatures()
80 Features.push_back("+unaligned-symbols"); in getSystemZTargetFeatures()
82 Features.push_back("-unaligned-symbols"); in getSystemZTargetFeatures()
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DWebAssembly.cpp126 void WebAssemblyTargetInfo::setSIMDLevel(llvm::StringMap<bool> &Features, in setSIMDLevel() argument
131 Features["relaxed-simd"] = true; in setSIMDLevel()
134 Features["simd128"] = true; in setSIMDLevel()
145 Features["simd128"] = false; in setSIMDLevel()
148 Features["relaxed-simd"] = false; in setSIMDLevel()
153 void WebAssemblyTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, in setFeatureEnabled() argument
157 setSIMDLevel(Features, SIMD128, Enabled); in setFeatureEnabled()
159 setSIMDLevel(Features, RelaxedSIMD, Enabled); in setFeatureEnabled()
161 Features[Name] = Enabled; in setFeatureEnabled()
165 llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, in initFeatureMap() argument
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H A DPPC.cpp42 bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, in handleTargetFeatures() argument
45 for (const auto &Feature : Features) { in handleTargetFeatures()
524 llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, in initFeatureMap() argument
533 Features = FeaturesOpt.value(); in initFeatureMap()
592 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); in initFeatureMap()
615 void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, in setFeatureEnabled() argument
619 Features["spe"] = true; in setFeatureEnabled()
633 Features["vsx"] = Features["altivec"] = true; in setFeatureEnabled()
635 Features["power8-vector"] = true; in setFeatureEnabled()
637 Features["power8-vector"] = Features["power9-vector"] = true; in setFeatureEnabled()
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H A DRISCV.cpp339 llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, in initFeatureMap() argument
345 Features["64bit"] = true; in initFeatureMap()
348 Features["32bit"] = true; in initFeatureMap()
365 return TargetInfo::initFeatureMap(Features, Diags, CPU, AllFeatures); in initFeatureMap()
410 bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, in handleTargetFeatures() argument
413 auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, Features); in handleTargetFeatures()
433 llvm::is_contained(Features, "+unaligned-scalar-mem"); in handleTargetFeatures()
435 if (llvm::is_contained(Features, "+experimental")) in handleTargetFeatures()
468 static void populateNegativeRISCVFeatures(std::vector<std::string> &Features) { in populateNegativeRISCVFeatures() argument
477 llvm::append_range(Features, FeatStrings); in populateNegativeRISCVFeatures()
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H A DSystemZ.h192 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, in initFeatureMap() argument
197 Features["transactional-execution"] = true; in initFeatureMap()
199 Features["vector"] = true; in initFeatureMap()
201 Features["vector-enhancements-1"] = true; in initFeatureMap()
203 Features["vector-enhancements-2"] = true; in initFeatureMap()
205 Features["nnp-assist"] = true; in initFeatureMap()
207 Features["miscellaneous-extensions-4"] = true; in initFeatureMap()
208 Features["vector-enhancements-3"] = true; in initFeatureMap()
210 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); in initFeatureMap()
213 bool handleTargetFeatures(std::vector<std::string> &Features, in handleTargetFeatures() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRELFStreamer.cpp10 static unsigned getEFlagsForFeatureSet(const FeatureBitset &Features) { in getEFlagsForFeatureSet() argument
14 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
16 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
18 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
20 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
22 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
24 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
26 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
28 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
30 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet()
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/freebsd/contrib/llvm-project/llvm/lib/Object/
H A DELFObjectFile.cpp101 SubtargetFeatures Features; in getMIPSFeatures() local
108 Features.AddFeature("mips2"); in getMIPSFeatures()
111 Features.AddFeature("mips3"); in getMIPSFeatures()
114 Features.AddFeature("mips4"); in getMIPSFeatures()
117 Features.AddFeature("mips5"); in getMIPSFeatures()
120 Features.AddFeature("mips32"); in getMIPSFeatures()
123 Features.AddFeature("mips64"); in getMIPSFeatures()
126 Features.AddFeature("mips32r2"); in getMIPSFeatures()
129 Features.AddFeature("mips64r2"); in getMIPSFeatures()
132 Features.AddFeature("mips32r6"); in getMIPSFeatures()
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsX86.td52 let Features = "mmx";
55 let Attributes = [NoThrow, Const, RequiredVectorWidth<64>], Features = "sse" in {
63 let Features = "sse" in {
67 let Features = "sse2" in {
75 let Features = "sse" in {
79 let Features = "sse2" in {
85 let Features = "sse" in {
90 let Features = "sse2" in {
95 let Features = "sse2" in {
110 let Features = "sse3" in {
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H A DBuiltinsRISCV.td18 let Features = features;
45 let Features = "zbkx,32bit" in {
48 } // Features = "zbkx,32bit"
50 let Features = "zbkx,64bit" in {
53 } // Features = "zbkx,64bit"
66 let Features = "zknd,32bit" in {
69 } // Features = "zknd,32bit"
71 let Features = "zknd,64bit" in {
75 } // Features = "zknd,64bit"
80 let Features = "zknd|zkne,64bit" in {
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H A DBuiltinsX86_64.td36 let Features = "cx16", Header = "intrin.h", Languages = "ALL_MS_LANGUAGES", Attributes = [NoThrow, …
45 let Features = "sse", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
50 let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
55 let Features = "sse2", Attributes = [NoThrow] in {
59 let Features = "sse4.1", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
63 let Features = "crc32", Attributes = [NoThrow, Const] in {
67 let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
72 let Features = "fsgsbase", Attributes = [NoThrow] in {
83 let Features = "fxsr", Attributes = [NoThrow] in {
88 let Features = "xsave", Attributes = [NoThrow] in {
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/freebsd/contrib/llvm-project/clang/lib/Basic/
H A DTargetID.cpp28 auto Features = T.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind) in getAllPossibleAMDGPUTargetIDFeatures() local
30 if (Features & llvm::AMDGPU::FEATURE_SRAMECC) in getAllPossibleAMDGPUTargetIDFeatures()
32 if (Features & llvm::AMDGPU::FEATURE_XNACK) in getAllPossibleAMDGPUTargetIDFeatures()
79 auto Features = Split.second; in parseTargetIDWithFormatCheckingOnly() local
80 if (Features.empty()) in parseTargetIDWithFormatCheckingOnly()
87 while (!Features.empty()) { in parseTargetIDWithFormatCheckingOnly()
88 auto Splits = Features.split(':'); in parseTargetIDWithFormatCheckingOnly()
97 Features = Splits.second; in parseTargetIDWithFormatCheckingOnly()
128 const llvm::StringMap<bool> &Features) { in getCanonicalTargetID() argument
131 for (const auto &F : Features) in getCanonicalTargetID()
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/freebsd/contrib/llvm-project/clang/lib/Lex/
H A DLiteralSupport.cpp81 static CharSourceRange MakeCharSourceRange(const LangOptions &Features, in MakeCharSourceRange() argument
88 TokLoc.getManager(), Features); in MakeCharSourceRange()
91 TokLoc.getManager(), Features); in MakeCharSourceRange()
101 const LangOptions &Features, FullSourceLoc TokLoc, in Diag() argument
106 TokLoc.getManager(), Features); in Diag()
108 MakeCharSourceRange(Features, TokLoc, TokBegin, TokRangeBegin, TokRangeEnd); in Diag()
136 const LangOptions &Features, in ProcessCharEscape() argument
163 Diag(Diags, Features, Loc, ThisTokBegin, EscapeBegin, ThisTokBuf, in ProcessCharEscape()
169 Diag(Diags, Features, Loc, ThisTokBegin, EscapeBegin, ThisTokBuf, in ProcessCharEscape()
196 Diag(Diags, Features, Loc, ThisTokBegin, EscapeBegin, ThisTokBuf, in ProcessCharEscape()
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