Searched refs:FalseSImm (Results 1 – 1 of 1) sorted by relevance
19983 int64_t FalseSImm = cast<ConstantSDNode>(FalseV)->getSExtValue(); in PerformDAGCombine() local19986 if (isInt<12>(TrueSImm) && isInt<12>(FalseSImm) && in PerformDAGCombine()19987 isInt<12>(TrueSImm - FalseSImm)) { in PerformDAGCombine()19993 DAG.getSignedConstant(TrueSImm - FalseSImm, DL, VT)); in PerformDAGCombine()