| /freebsd/contrib/hyperv/tools/ |
| H A D | hv_vss_daemon.c | 24 #define FREEZE (1) macro
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 223 FREEZE, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 589 Lo = DAG.getNode(ISD::FREEZE, dl, L.getValueType(), L); in SplitRes_FREEZE()
590 Hi = DAG.getNode(ISD::FREEZE, dl, H.getValueType(), H); in SplitRes_FREEZE()
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| H A D | LegalizeFloatTypes.cpp | 155 case ISD::FREEZE: R = SoftenFloatRes_FREEZE(N); break; in SoftenFloatResult()
226 return DAG.getNode(ISD::FREEZE, SDLoc(N), Ty, in SoftenFloatRes_FREEZE()
1453 case ISD::FREEZE: ExpandFloatRes_FREEZE(N, Lo, Hi); break; in ExpandFloatResult()
1812 Lo = DAG.getNode(ISD::FREEZE, dl, Lo.getValueType(), Lo); in ExpandFloatRes_FREEZE()
1813 Hi = DAG.getNode(ISD::FREEZE, dl, Hi.getValueType(), Hi); in ExpandFloatRes_FREEZE()
3055 case ISD::FREEZE: in SoftPromoteHalfResult()
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| H A D | SelectionDAGDumper.cpp | 457 case ISD::FREEZE: return "freeze"; in getOperationName()
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| H A D | SelectionDAG.cpp | 352 return N->getOpcode() == ISD::FREEZE && N->getOperand(0).isUndef(); in isFreezeUndef()
2401 return getNode(ISD::FREEZE, SDLoc(V), V.getValueType(), V); in getFreeze()
5130 if (Op.getOpcode() == ISD::FREEZE) in isGuaranteedNotToBeUndefOrPoison()
5151 if (Opcode == ISD::FREEZE) in isGuaranteedNotToBeUndefOrPoison()
5254 case ISD::FREEZE: in canCreateUndefOrPoison()
5959 case ISD::FREEZE: in getNode()
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| H A D | LegalizeIntegerTypes.cpp | 306 case ISD::FREEZE: in PromoteIntegerResult()
566 return DAG.getNode(ISD::FREEZE, SDLoc(N), in PromoteIntRes_FREEZE()
2775 case ISD::FREEZE: SplitRes_FREEZE(N, Lo, Hi); break; in ExpandIntegerResult()
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| H A D | LegalizeVectorTypes.cpp | 107 case ISD::FREEZE: in ScalarizeVectorResult()
1184 case ISD::FREEZE: in SplitVectorResult()
4586 case ISD::FREEZE: in WidenVectorResult()
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| H A D | SelectionDAGISel.cpp | 3237 case ISD::FREEZE: in SelectCodeCommon()
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| H A D | DAGCombiner.cpp | 1972 case ISD::FREEZE: return visitFREEZE(N); in visit()
3803 if (N->getOpcode() == ISD::FREEZE && N.hasOneUse()) in visitSUB()
15730 if (FrozenMaybePoisonOperand.getOpcode() == ISD::FREEZE && in visitFREEZE()
18193 if (N1->getOpcode() == ISD::FREEZE && N1.hasOneUse()) { in visitBRCOND()
18228 if (S0->getOpcode() == ISD::FREEZE && S0.hasOneUse() && S1C) { in visitBRCOND()
18234 if (S1->getOpcode() == ISD::FREEZE && S1.hasOneUse() && S0C) { in visitBRCOND()
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| H A D | TargetLowering.cpp | 751 case ISD::FREEZE: { in SimplifyMultipleUseDemandedBits()
3228 case ISD::FREEZE: { in SimplifyDemandedVectorElts()
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| H A D | SelectionDAGBuilder.cpp | 12492 Values[i] = DAG.getNode(ISD::FREEZE, getCurSDLoc(), ValueVTs[i], in visitFreeze()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrFragments.td | 691 // CopyFromReg. FREEZE may be coming from a a truncate. Any other 32-bit
700 N->getOpcode() != ISD::FREEZE;
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| H A D | X86ISelLowering.cpp | 43372 case ISD::FREEZE: in checkBitcastSrcVectorSize()
43443 case ISD::FREEZE: in signExtendBitcastSrcVector()
50386 SDValue Freeze_And0_R = DAG.getNode(ISD::FREEZE, SDLoc(), VT, And0_R); in foldMaskedMergeImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1826 case Freeze: return ISD::FREEZE; in InstructionOpcodeToISD()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 486 def freeze : SDNode<"ISD::FREEZE" , SDTFreeze>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 970 Opc != ISD::FREEZE; in SelectArithExtendedRegister()
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