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Searched refs:FP_TO_UINT (Results 1 – 25 of 42) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp3387 {ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1}, in getCastInstrCost()
3388 {ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1}, in getCastInstrCost()
3389 {ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1}, in getCastInstrCost()
3395 {ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2}, in getCastInstrCost()
3396 {ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1}, in getCastInstrCost()
3397 {ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1}, in getCastInstrCost()
3402 {ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2}, in getCastInstrCost()
3403 {ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2}, in getCastInstrCost()
3410 {ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f32, 1}, in getCastInstrCost()
3411 {ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f32, 1}, in getCastInstrCost()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp2406 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
2407 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, { 1, 1, 1, 1 } }, in getCastInstrCost()
2545 { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f64, { 1, 1, 1, 1 } }, in getCastInstrCost()
2546 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f64, { 3, 1, 1, 1 } }, in getCastInstrCost()
2547 { ISD::FP_TO_UINT, MVT::v8i8, MVT::v8f64, { 3, 1, 1, 1 } }, in getCastInstrCost()
2548 { ISD::FP_TO_UINT, MVT::v16i32, MVT::v16f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
2549 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, { 3, 1, 1, 1 } }, in getCastInstrCost()
2550 { ISD::FP_TO_UINT, MVT::v16i8, MVT::v16f32, { 3, 1, 1, 1 } }, in getCastInstrCost()
2658 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v4f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
2659 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp730 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
732 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
734 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
748 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
750 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
752 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
765 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
767 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
769 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
771 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
H A DARMISelLowering.cpp193 setOperationAction(ISD::FP_TO_UINT, VT, Custom); in addTypeForNEON()
198 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
324 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addMVEVectorTypes()
483 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addMVEVectorTypes()
494 setOperationAction(ISD::FP_TO_UINT, MVT::v2i1, Expand); in addMVEVectorTypes()
954 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); in ARMTargetLowering()
955 setOperationAction(ISD::FP_TO_UINT, MVT::v8i16, Custom); in ARMTargetLowering()
1008 ISD::FP_TO_UINT, ISD::FMUL, ISD::LOAD}); in ARMTargetLowering()
1080 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in ARMTargetLowering()
1082 setOperationAction(ISD::FP_TO_UINT, MVT::f64, Custom); in ARMTargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstrainedOps.def61 DAG_INSTRUCTION(FPToUI, 1, 0, experimental_constrained_fptoui, FP_TO_UINT)
H A DVPIntrinsics.def475 HELPER_REGISTER_FP_CAST_VP(fptoui, VP_FP_TO_UINT, FPToUI, FP_TO_UINT)
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h909 FP_TO_UINT, enumerator
H A DSDPatternMatch.h1048 return UnaryOpc_match<Opnd>(ISD::FP_TO_UINT, Op);
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp261 setOperationAction(ISD::FP_TO_UINT, T, Custom); in initializeHVXLowering()
336 setOperationAction(ISD::FP_TO_UINT, T, Custom); in initializeHVXLowering()
437 setOperationAction(ISD::FP_TO_UINT, VecTy, Custom); in initializeHVXLowering()
2313 Op.getOpcode() == ISD::FP_TO_UINT); in LowerHvxFpToInt()
2713 assert(Opc == ISD::FP_TO_SINT || Opc == ISD::FP_TO_UINT || in EqualizeFpIntConversion()
2736 assert(Opc == ISD::FP_TO_SINT || Opc == ISD::FP_TO_UINT); in ExpandHvxFpToInt()
2853 assert(Opc == ISD::FP_TO_UINT); in ExpandHvxFpToInt()
3194 case ISD::FP_TO_UINT: in LowerHvxOperation()
3272 case ISD::FP_TO_UINT: return LowerHvxFpToInt(Op, DAG); in LowerHvxOperation()
3443 case ISD::FP_TO_UINT: in LowerHvxOperationWrapper()
[all …]
H A DHexagonISelLowering.cpp1867 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1868 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
1869 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in HexagonTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp402 case ISD::FP_TO_UINT: in LegalizeOp()
720 case ISD::FP_TO_UINT: in Promote()
873 if (NewOpc == ISD::FP_TO_UINT && in PromoteFP_TO_INT()
893 if (Node->getOpcode() == ISD::FP_TO_UINT || in PromoteFP_TO_INT()
1014 case ISD::FP_TO_UINT: in Expand()
H A DSelectionDAGDumper.cpp414 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
H A DLegalizeFloatTypes.cpp1151 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break; in SoftenFloatOperand()
2298 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_XINT(N); break; in ExpandFloatOperand()
2624 case ISD::FP_TO_UINT: in PromoteFloatOperand()
3743 case ISD::FP_TO_UINT: Res = SoftPromoteHalfOp_FP_TO_XINT(N); break; in SoftPromoteHalfOperand()
H A DLegalizeVectorTypes.cpp113 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
758 case ISD::FP_TO_UINT: in ScalarizeVectorOperand()
1240 case ISD::FP_TO_UINT: in SplitVectorResult()
3468 case ISD::FP_TO_UINT: in SplitVectorOperand()
4871 case ISD::FP_TO_UINT: in WidenVectorResult()
6862 case ISD::FP_TO_UINT: in WidenVectorOperand()
H A DLegalizeDAG.cpp2974 OpToUse = IsStrict ? ISD::STRICT_FP_TO_UINT : ISD::FP_TO_UINT; in PromoteLegalFP_TO_INT()
3482 case ISD::FP_TO_UINT: in ExpandNode()
5055 case ISD::FP_TO_UINT: in ConvertNodeToLibcall()
5391 case ISD::FP_TO_UINT: in PromoteNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp91 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in XtensaTargetLowering()
233 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in XtensaTargetLowering()
240 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in XtensaTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp502 {ISD::UINT_TO_FP, ISD::SINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in AMDGPUTargetLowering()
523 ISD::FP_TO_UINT, ISD::MUL, ISD::MULHU, in AMDGPUTargetLowering()
1461 case ISD::FP_TO_UINT: in LowerOperation()
1986 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
2141 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2); in LowerUDIVREM64()
2142 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc); in LowerUDIVREM64()
3558 : ISD::FP_TO_UINT, in LowerFP_TO_INT64()
3560 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP_TO_INT64()
H A DR600ISelLowering.cpp114 setOperationAction({ISD::FP_TO_UINT, ISD::FP_TO_SINT}, {MVT::i1, MVT::i64}, in R600TargetLowering()
590 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1684 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in SparcTargetLowering()
1686 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in SparcTargetLowering()
3117 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG, *this, in LowerOperation()
3459 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp296 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in PPCTargetLowering()
297 AddPromotedToType(ISD::FP_TO_UINT, MVT::i1, RegVT); in PPCTargetLowering()
325 setOperationAction(ISD::FP_TO_UINT, MVT::ppcf128, Custom); in PPCTargetLowering()
704 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
710 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
720 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in PPCTargetLowering()
723 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
735 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in PPCTargetLowering()
745 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
934 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp642 ISD::FP_TO_SINT, ISD::FP_TO_UINT, ISD::FSHL, ISD::FSHR, in NVPTXTargetLowering()
813 ISD::MULHU, ISD::FP_TO_SINT, ISD::FP_TO_UINT, in NVPTXTargetLowering()
925 {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in NVPTXTargetLowering()
929 {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in NVPTXTargetLowering()
2925 case ISD::FP_TO_UINT: in LowerOperation()
6345 case ISD::FP_TO_UINT: in getPreferredFPToIntOpcode()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp235 for (auto Op : {ISD::FP_TO_UINT, ISD::STRICT_FP_TO_UINT}) in SystemZTargetLowering()
294 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom); in SystemZTargetLowering()
503 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in SystemZTargetLowering()
504 setOperationAction(ISD::FP_TO_UINT, MVT::v2f64, Legal); in SystemZTargetLowering()
523 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in SystemZTargetLowering()
524 setOperationAction(ISD::FP_TO_UINT, MVT::v4f32, Legal); in SystemZTargetLowering()
7143 case ISD::FP_TO_UINT: in LowerOperation()
7335 case ISD::FP_TO_UINT: in LowerOperationWrapper()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp213 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Promote); // use i64 in initSPUActions()
215 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in initSPUActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp133 setOperationAction(ISD::FP_TO_UINT, GRLenVT, Custom); in LoongArchTargetLowering()
219 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in LoongArchTargetLowering()
319 setOperationAction({ISD::FP_TO_SINT, ISD::FP_TO_UINT}, VT, Legal); in LoongArchTargetLowering()
386 setOperationAction({ISD::FP_TO_SINT, ISD::FP_TO_UINT}, VT, Legal); in LoongArchTargetLowering()
4099 case ISD::FP_TO_UINT: { in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1889 case FPToUI: return ISD::FP_TO_UINT; in InstructionOpcodeToISD()

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