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Searched refs:FP_TO_UINT (Results 1 – 25 of 40) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp2628 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
2629 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
2630 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
2636 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
2637 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
2638 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
2643 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
2644 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
2651 { ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f32, 1 }, in getCastInstrCost()
2652 { ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f32, 1 }, in getCastInstrCost()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp2289 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
2290 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, { 1, 1, 1, 1 } }, in getCastInstrCost()
2425 { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f64, { 1, 1, 1, 1 } }, in getCastInstrCost()
2426 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f64, { 3, 1, 1, 1 } }, in getCastInstrCost()
2427 { ISD::FP_TO_UINT, MVT::v8i8, MVT::v8f64, { 3, 1, 1, 1 } }, in getCastInstrCost()
2428 { ISD::FP_TO_UINT, MVT::v16i32, MVT::v16f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
2429 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, { 3, 1, 1, 1 } }, in getCastInstrCost()
2430 { ISD::FP_TO_UINT, MVT::v16i8, MVT::v16f32, { 3, 1, 1, 1 } }, in getCastInstrCost()
2538 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v4f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
2539 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f32, { 1, 1, 1, 1 } }, in getCastInstrCost()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp710 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
712 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
714 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
728 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
730 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
732 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
745 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
747 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
749 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
751 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
H A DARMISelLowering.cpp188 setOperationAction(ISD::FP_TO_UINT, VT, Custom); in addTypeForNEON()
193 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addTypeForNEON()
319 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addMVEVectorTypes()
473 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in addMVEVectorTypes()
484 setOperationAction(ISD::FP_TO_UINT, MVT::v2i1, Expand); in addMVEVectorTypes()
956 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); in ARMTargetLowering()
957 setOperationAction(ISD::FP_TO_UINT, MVT::v8i16, Custom); in ARMTargetLowering()
1010 ISD::FP_TO_UINT, ISD::FMUL, ISD::LOAD}); in ARMTargetLowering()
1081 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in ARMTargetLowering()
1083 setOperationAction(ISD::FP_TO_UINT, MVT::f64, Custom); in ARMTargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstrainedOps.def61 DAG_INSTRUCTION(FPToUI, 1, 0, experimental_constrained_fptoui, FP_TO_UINT)
H A DVPIntrinsics.def503 HELPER_REGISTER_FP_CAST_VP(fptoui, VP_FP_TO_UINT, FPToUI, FP_TO_UINT, 0)
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h865 FP_TO_UINT, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp257 setOperationAction(ISD::FP_TO_UINT, T, Custom); in initializeHVXLowering()
330 setOperationAction(ISD::FP_TO_UINT, T, Custom); in initializeHVXLowering()
427 setOperationAction(ISD::FP_TO_UINT, VecTy, Custom); in initializeHVXLowering()
2276 Op.getOpcode() == ISD::FP_TO_UINT); in LowerHvxFpToInt()
2676 assert(Opc == ISD::FP_TO_SINT || Opc == ISD::FP_TO_UINT || in EqualizeFpIntConversion()
2699 assert(Opc == ISD::FP_TO_SINT || Opc == ISD::FP_TO_UINT); in ExpandHvxFpToInt()
2816 assert(Opc == ISD::FP_TO_UINT); in ExpandHvxFpToInt()
3157 case ISD::FP_TO_UINT: in LowerHvxOperation()
3235 case ISD::FP_TO_UINT: return LowerHvxFpToInt(Op, DAG); in LowerHvxOperation()
3406 case ISD::FP_TO_UINT in LowerHvxOperationWrapper()
[all...]
H A DHexagonISelLowering.cpp1793 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1794 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
1795 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in HexagonTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp391 case ISD::FP_TO_UINT: in LegalizeOp()
675 case ISD::FP_TO_UINT: in Promote()
797 if (NewOpc == ISD::FP_TO_UINT && in PromoteFP_TO_INT()
817 if (Node->getOpcode() == ISD::FP_TO_UINT || in PromoteFP_TO_INT()
905 case ISD::FP_TO_UINT: in Expand()
H A DSelectionDAGDumper.cpp394 case ISD::FP_TO_UINT: return "fp_to_uint"; in getOperationName()
H A DLegalizeFloatTypes.cpp1009 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break; in SoftenFloatOperand()
2082 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_XINT(N); break; in ExpandFloatOperand()
2411 case ISD::FP_TO_UINT: in PromoteFloatOperand()
3400 case ISD::FP_TO_UINT: Res = SoftPromoteHalfOp_FP_TO_XINT(N); break; in SoftPromoteHalfOperand()
H A DLegalizeIntegerTypes.cpp166 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; in PromoteIntegerResult()
821 if (N->getOpcode() == ISD::FP_TO_UINT && in PromoteIntRes_FP_TO_XINT()
822 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && in PromoteIntRes_FP_TO_XINT()
857 return DAG.getNode((N->getOpcode() == ISD::FP_TO_UINT || in PromoteIntRes_FP_TO_XINT()
2800 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_XINT(N, Lo, Hi); break; in ExpandIntegerResult()
3928 Op = DAG.getNode(IsSigned ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, dl, VT, Op); in ExpandIntRes_FP_TO_XINT()
H A DLegalizeVectorTypes.cpp111 case ISD::FP_TO_UINT: in ScalarizeVectorResult()
754 case ISD::FP_TO_UINT: in ScalarizeVectorOperand()
1192 case ISD::FP_TO_UINT: in SplitVectorResult()
3193 case ISD::FP_TO_UINT: in SplitVectorOperand()
4502 case ISD::FP_TO_UINT: in WidenVectorResult()
6415 case ISD::FP_TO_UINT: in WidenVectorOperand()
H A DLegalizeDAG.cpp2947 OpToUse = IsStrict ? ISD::STRICT_FP_TO_UINT : ISD::FP_TO_UINT; in PromoteLegalFP_TO_INT()
3425 case ISD::FP_TO_UINT: in ExpandNode()
4847 case ISD::FP_TO_UINT: in ConvertNodeToLibcall()
5180 case ISD::FP_TO_UINT: in PromoteNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp489 {ISD::UINT_TO_FP, ISD::SINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in AMDGPUTargetLowering()
510 ISD::FP_TO_UINT, ISD::MUL, ISD::MULHU, in AMDGPUTargetLowering()
1404 case ISD::FP_TO_UINT: in LowerOperation()
1929 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
2084 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2); in LowerUDIVREM64()
2085 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc); in LowerUDIVREM64()
3500 : ISD::FP_TO_UINT, in LowerFP_TO_INT64()
3502 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP_TO_INT64()
H A DR600ISelLowering.cpp110 setOperationAction({ISD::FP_TO_UINT, ISD::FP_TO_SINT}, {MVT::i1, MVT::i64}, in R600TargetLowering()
586 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp287 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in PPCTargetLowering()
288 AddPromotedToType(ISD::FP_TO_UINT, MVT::i1, in PPCTargetLowering()
317 setOperationAction(ISD::FP_TO_UINT, MVT::ppcf128, Custom); in PPCTargetLowering()
697 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in PPCTargetLowering()
703 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
713 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in PPCTargetLowering()
716 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in PPCTargetLowering()
728 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in PPCTargetLowering()
738 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in PPCTargetLowering()
925 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in PPCTargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp69 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in XtensaTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1693 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in SparcTargetLowering()
1695 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in SparcTargetLowering()
3257 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG, *this, in LowerOperation()
3605 case ISD::FP_TO_UINT: in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp118 setOperationAction(ISD::FP_TO_UINT, GRLenVT, Custom); in LoongArchTargetLowering()
190 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in LoongArchTargetLowering()
273 setOperationAction({ISD::FP_TO_SINT, ISD::FP_TO_UINT}, VT, Legal); in LoongArchTargetLowering()
320 setOperationAction({ISD::FP_TO_SINT, ISD::FP_TO_UINT}, VT, Legal); in LoongArchTargetLowering()
2878 case ISD::FP_TO_UINT: { in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp531 ISD::FP_TO_SINT, ISD::FP_TO_UINT, ISD::FSHL, ISD::FSHR, in NVPTXTargetLowering()
703 ISD::MULHU, ISD::FP_TO_SINT, ISD::FP_TO_UINT, in NVPTXTargetLowering()
796 {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in NVPTXTargetLowering()
800 {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::FP_TO_SINT, ISD::FP_TO_UINT}, in NVPTXTargetLowering()
2792 case ISD::FP_TO_UINT: in LowerOperation()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp213 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Promote); // use i64 in initSPUActions()
215 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); in initSPUActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp225 setOperationAction(ISD::FP_TO_UINT, VT, Expand); in SystemZTargetLowering()
269 setOperationAction(ISD::FP_TO_UINT, MVT::i128, LibCall); in SystemZTargetLowering()
471 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal); in SystemZTargetLowering()
472 setOperationAction(ISD::FP_TO_UINT, MVT::v2f64, Legal); in SystemZTargetLowering()
491 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); in SystemZTargetLowering()
492 setOperationAction(ISD::FP_TO_UINT, MVT::v4f32, Legal); in SystemZTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp1102 case ISD::FP_TO_UINT: in getCastInstrCost()

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