Home
last modified time | relevance | path

Searched refs:FPSCR (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td180 // We model fpscr with two registers: FPSCR models the control bits and will be
188 def FPSCR : ARMReg<3, "fpscr">;
190 let Aliases = [FPSCR];
414 // FPSCR, when the flags at the top of it are used as the input or
420 // This RegisterClass is required to add FPSCR and FPEXC into a calling
422 def FP_STATUS_REGS : RegisterClass<"ARM", [i32], 32, (add FPSCR, FPEXC)> {
H A DARMInstrVFP.td341 …let Defs = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D1…
351 …let Defs = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D1…
359 let Defs = [VPR, FPSCR, FPSCR_NZCV];
360 …let Uses = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D1…
370 let Defs = [VPR, FPSCR, FPSCR_NZCV];
371 …let Uses = [VPR, FPSCR, FPSCR_NZCV, D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D1…
1759 // And the Z bit '0' variants, i.e. use the rounding mode specified by FPSCR.
1760 let Uses = [FPSCR] in {
2522 // APSR is the application level alias of CPSR. This FPSCR N, Z, C, V flags
2530 // Application level FPSCR -> GPR
[all …]
H A DARMFrameLowering.cpp221 case ARM::FPSCR: in getSpillArea()
1853 if (RegPresent(ARM::FPSCR)) { in emitFPStatusSaves()
1900 if (!RegPresent(ARM::FPSCR) && !RegPresent(ARM::FPEXC)) in emitFPStatusRestores()
1911 if (RegPresent(ARM::FPSCR)) { in emitFPStatusRestores()
1921 if (RegPresent(ARM::FPSCR)) { in emitFPStatusRestores()
2549 SavedRegs.set(ARM::FPSCR); in determineCalleeSaves()
H A DARMBaseRegisterInfo.cpp234 markSuperRegs(Reserved, ARM::FPSCR); in getReservedRegs()
H A DARMCallingConv.td271 def CSR_FP_Interrupt_Regs : CalleeSavedRegs<(add FPSCR, FPEXC, (sequence "D%u", 15, 0))>;
H A DARMISelLowering.cpp6479 SDValue FPSCR = in LowerGET_ROUNDING() local
6481 Chain = FPSCR.getValue(1); in LowerGET_ROUNDING()
6482 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerGET_ROUNDING()
6518 SDValue FPSCR = in LowerSET_ROUNDING() local
6520 Chain = FPSCR.getValue(1); in LowerSET_ROUNDING()
6521 FPSCR = FPSCR.getValue(0); in LowerSET_ROUNDING()
6525 FPSCR = DAG.getNode(ISD::AND, DL, MVT::i32, FPSCR, in LowerSET_ROUNDING()
6527 FPSCR = DAG.getNode(ISD::OR, DL, MVT::i32, FPSCR, RMValue); in LowerSET_ROUNDING()
6529 Chain, DAG.getConstant(Intrinsic::arm_set_fpscr, DL, MVT::i32), FPSCR}; in LowerSET_ROUNDING()
6543 SDValue FPSCR = in LowerSET_FPMODE() local
[all …]
H A DARMScheduleSwift.td652 // 4.2.38 Advanced SIMD and VFP, Move FPSCR
H A DARMAsmPrinter.cpp1218 SrcReg = ARM::FPSCR; in EmitUnwindingInstruction()
H A DARMInstrMVE.td5050 // Custom decoder method in order to add the FPSCR operand(s), which
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt257 rnd ← bfp_ROUND_TO_BFP128(RO, FPSCR.RN, v)
262 rnd ← bfp_ROUND_TO_BFP128(RO, FPSCR.RN, v)
267 rnd ← bfp_NEGATE(bfp_ROUND_TO_BFP128(RO, FPSCR.RN, v))
272 rnd ← bfp_NEGATE(bfp_ROUND_TO_BFP128(RO, FPSCR.RN, v))
H A DPPCInstrInfo.td197 // Extract FPSCR (not modeled at the DAG level).
2847 // to manipulate FPSCR. Note that FPSCR is not modeled at the DAG level.
2849 // When FM is 30/31, we are setting the 62/63 bit of FPSCR, the implicit-def
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsPowerPC.td37 // Get content from current FPSCR register
45 // Set FPSCR register, and return previous content
1646 // PowerPC set FPSCR Intrinsic Definitions.
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsPPC.def1005 // Get content from current FPSCR
1008 // Set content of FPSCR, and return its content before update
H A DAttrDocs.td2700 along with FPEXC and FPSCR. Note, even on M-class CPUs, where the floating
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp247 {codeview::RegisterId::ARM_FPSCR, ARM::FPSCR}, in initLLVMToCVRegMapping()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp6695 return ARM::FPSCR; in FixedRegForVSTRVLDR_SYSREG()