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Searched refs:FPR128 (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td3383 // Match all load 128 bits width whose type is compatible with FPR128
3538 // Match all load 128 bits width whose type is compatible with FPR128
3732 // Match all load 128 bits width whose type is compatible with FPR128
4055 def : Pat<(AArch64stnp FPR128:$Rt, FPR128:$Rt2, (am_indexed7s128 GPR64sp:$Rn, simm7s16:$offset)),
4056 (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, simm7s16:$offset)>;
4079 def : Pat<(store (f128 FPR128:$Rt),
4082 (STRQroW FPR128:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend128:$extend)>;
4083 def : Pat<(store (f128 FPR128:$Rt),
4086 (STRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro_Wextend128:$extend)>;
4136 // Match all store 128 bits width whose type is compatible with FPR128
[all …]
H A DAArch64RegisterInfo.td480 def FPR128 : RegisterClass<"AArch64",
492 128, (trunc FPR128, 16)> {
501 128, (trunc FPR128, 8)> {
527 def QSeqPairs : RegisterTuples<[qsub0, qsub1], [(rotl FPR128, 0), (rotl FPR128, 1)]>;
529 [(rotl FPR128, 0), (rotl FPR128, 1),
530 (rotl FPR128, 2)]>;
532 [(rotl FPR128, 0), (rotl FPR128, 1),
533 (rotl FPR128, 2), (rotl FPR128, 3)]>;
563 def V128 : RegisterOperand<FPR128, "printVRegOperand"> {
701 defm VecListOne : VectorList<1, FPR64, FPR128>;
[all …]
H A DAArch64FrameLowering.cpp2908 enum RegType { GPR, FPR64, FPR128, PPR, ZPR, VG } Type; enumerator
2923 case FPR128: in getScale()
2982 RPI.Type = RegPairInfo::FPR128; in computeCalleeSaveRegisterPairs()
3017 case RegPairInfo::FPR128: in computeCalleeSaveRegisterPairs()
3086 RPI.Type != RegPairInfo::FPR128 && !RPI.isPaired() && in computeCalleeSaveRegisterPairs()
3203 case RegPairInfo::FPR128: in spillCalleeSavedRegisters()
3444 case RegPairInfo::FPR128: in restoreCalleeSavedRegisters()
H A DAArch64InstrFormats.td11586 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst),
11587 (ins FPR128:$Rd, FPR32:$Rn, V128:$Rm),
11588 [(set (v4i32 FPR128:$dst),
11589 (OpNode (v4i32 FPR128:$Rd), (i32 FPR32:$Rn),
11600 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst),
11601 (ins FPR128:$Rd, FPR128:$Rn, V128:$Rm),
11602 [(set (v4i32 FPR128:$dst),
11603 (OpNode (v4i32 FPR128:$Rd), (v4i32 FPR128:$Rn),
11682 : CryptoRRR<op0, op1, (outs FPR128:$Vdst), (ins FPR128:$Vd, FPR128:$Vn, V128:$Vm),
H A DAArch64SMEInstrInfo.td208 …defm _FPR128 : CoalescerBarrierPseudo<FPR128, [f128, v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f…
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp314 const auto &FPR128 = AArch64MCRegisterClasses[AArch64::FPR128RegClassID]; in isQForm() local
316 return Op.isReg() && FPR128.contains(Op.getReg()); in isQForm()
321 const auto &FPR128 = AArch64MCRegisterClasses[AArch64::FPR128RegClassID]; in isFpOrNEON() local
331 return FPR128.contains(Reg) || FPR64.contains(Reg) || FPR32.contains(Reg) || in isFpOrNEON()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td217 class FPR128<bits<16> num, string n, FPR64 low, FPR64 high>
237 def F#I#Q : FPR128<I, "f"#I, !cast<FPR64>("F"#!add(I, 2)#"D"),
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td203 def FPR128 : RegisterClass<"CSKY",