Searched refs:FMV_X_ANYEXTW_RV64 (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 106 FMV_X_ANYEXTW_RV64, enumerator
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| H A D | RISCVInstrInfoF.td | 44 : SDNode<"RISCVISD::FMV_X_ANYEXTW_RV64", SDT_RISCVFMV_X_ANYEXTW_RV64>;
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| H A D | RISCVISelLowering.cpp | 6717 return DAG.getNode(RISCVISD::FMV_X_ANYEXTW_RV64, DL, MVT::i64, Res); in LowerOperation()
6746 return DAG.getNode(RISCVISD::FMV_X_ANYEXTW_RV64, DL, MVT::i64, Res); in LowerOperation()
12619 DAG.getNode(RISCVISD::FMV_X_ANYEXTW_RV64, DL, MVT::i64, Op0); in ReplaceNodeResults()
16746 // If the input to FMV_W_X_RV64 is just FMV_X_ANYEXTW_RV64 the the in PerformDAGCombine()
16748 // FMV_X_ANYEXTW_RV64 operand. in PerformDAGCombine()
16750 if (Op0.getOpcode() == RISCVISD::FMV_X_ANYEXTW_RV64) in PerformDAGCombine()
16755 case RISCVISD::FMV_X_ANYEXTW_RV64: { in PerformDAGCombine()
16759 // If the input to FMV_X_ANYEXTW_RV64 is just FMV_W_X_RV64 then the in PerformDAGCombine()
16762 if ((N->getOpcode() == RISCVISD::FMV_X_ANYEXTW_RV64 && in PerformDAGCombine()
16779 unsigned FPBits = N->getOpcode() == RISCVISD::FMV_X_ANYEXTW_RV64 in PerformDAGCombine()
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