| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 96 DAG_FUNCTION(ldexp, 2, 1, experimental_constrained_ldexp, FLDEXP)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 974 FLDEXP, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 311 case ISD::FLDEXP: return "fldexp"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 125 case ISD::FLDEXP: in SoftenFloatResult()
1451 case ISD::FLDEXP: in ExpandFloatResult()
2643 case ISD::FLDEXP: R = PromoteFloatRes_ExpOp(N); break; in PromoteFloatResult()
3083 case ISD::FLDEXP: R = SoftPromoteHalfRes_ExpOp(N); break; in SoftPromoteHalfResult()
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| H A D | LegalizeDAG.cpp | 2193 bool IsSignedArgument = Node->getOpcode() == ISD::FLDEXP; in ExpandFPLibCall()
3660 case ISD::FLDEXP: in ExpandNode()
4652 case ISD::FLDEXP: in ConvertNodeToLibcall()
5494 case ISD::FLDEXP: in PromoteNode()
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| H A D | LegalizeVectorTypes.cpp | 153 case ISD::FLDEXP: in ScalarizeVectorResult()
1088 case ISD::FLDEXP: in SplitVectorResult()
3208 case ISD::FLDEXP: in SplitVectorOperand()
4483 case ISD::FLDEXP: in WidenVectorResult()
6390 case ISD::FLDEXP: in WidenVectorOperand()
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| H A D | LegalizeVectorOps.cpp | 411 case ISD::FLDEXP: in LegalizeOp()
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| H A D | SelectionDAGBuilder.cpp | 6893 setValue(&I, DAG.getNode(ISD::FLDEXP, sdl, in visitIntrinsicCall()
9380 if (visitBinaryFloatCall(I, ISD::FLDEXP)) in visitCall()
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| H A D | LegalizeIntegerTypes.cpp | 1998 case ISD::FLDEXP: in PromoteIntegerOperand()
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| H A D | SelectionDAG.cpp | 5427 case ISD::FLDEXP: { in isKnownNeverNaN()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 213 ISD::FLDEXP, ISD::FFREXP, ISD::FLOG, ISD::FLOG2, in SITargetLowering()
536 setOperationAction({ISD::FLDEXP, ISD::STRICT_FLDEXP}, {MVT::f32, MVT::f64}, in SITargetLowering()
609 setOperationAction({ISD::FLDEXP, ISD::STRICT_FLDEXP}, MVT::f16, Custom); in SITargetLowering()
5835 case ISD::FLDEXP: in LowerOperation()
6742 return DAG.getNode(ISD::FLDEXP, DL, VT, Op.getOperand(0), TruncExp); in lowerFLDEXP()
11103 SDValue SqrtX = DAG.getNode(ISD::FLDEXP, DL, MVT::f64, X, ScaleUp, Flags); in lowerFSQRTF64()
11133 SqrtRet = DAG.getNode(ISD::FLDEXP, DL, MVT::f64, SqrtRet, ScaleDown, Flags); in lowerFSQRTF64()
12638 case ISD::FLDEXP: in isCanonicalized()
14734 case ISD::FLDEXP: in PerformDAGCombine()
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| H A D | AMDGPUISelLowering.cpp | 3082 SDValue R = DAG.getNode(ISD::FLDEXP, SL, VT, Exp2, IntE, Flags); in lowerFEXP()
3312 return DAG.getNode(ISD::FLDEXP, SL, MVT::f32, FVal, ShAmt); in LowerINT_TO_FP32()
3345 SDValue LdExp = DAG.getNode(ISD::FLDEXP, SL, MVT::f64, CvtHi, in LowerINT_TO_FP64()
5942 case ISD::FLDEXP: in isKnownNeverNaNForTargetNode()
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| H A D | AMDGPUISelDAGToDAG.cpp | 168 case ISD::FLDEXP: in fp16SrcZerosHighBits()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 763 setOperationAction({ISD::FROUND, ISD::FPOWI, ISD::FLDEXP, ISD::FFREXP}, VT, in initActions()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 538 def fldexp : SDNode<"ISD::FLDEXP" , SDTFPExpOp>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1792 setOperationAction(ISD::FLDEXP, MVT::f64, Custom); in AArch64TargetLowering()
1793 setOperationAction(ISD::FLDEXP, MVT::f32, Custom); in AArch64TargetLowering()
1794 setOperationAction(ISD::FLDEXP, MVT::f16, Custom); in AArch64TargetLowering()
1795 setOperationAction(ISD::FLDEXP, MVT::bf16, Custom); in AArch64TargetLowering()
1806 for (ISD::NodeType Op : {ISD::FLDEXP, ISD::STRICT_FLDEXP, ISD::FFREXP}) in AArch64TargetLowering()
1813 for (ISD::NodeType Op : {ISD::FLDEXP, ISD::STRICT_FLDEXP, ISD::FFREXP}) in AArch64TargetLowering()
7084 case ISD::FLDEXP: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1658 ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS, ISD::FLDEXP, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1586 for (ISD::NodeType Op : {ISD::FLDEXP, ISD::STRICT_FLDEXP, ISD::FFREXP}) in ARMTargetLowering()
1593 for (ISD::NodeType Op : {ISD::FLDEXP, ISD::STRICT_FLDEXP, ISD::FFREXP}) in ARMTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 868 setOperationAction(ISD::FLDEXP, VT, Expand); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 633 setOperationAction(ISD::FLDEXP, VT, Action); in X86TargetLowering()
2501 for (ISD::NodeType Op : {ISD::FLDEXP, ISD::STRICT_FLDEXP, ISD::FFREXP}) in X86TargetLowering()
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