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Searched refs:FCOPYSIGN (Results 1 – 25 of 32) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h507 FCOPYSIGN, enumerator
H A DBasicTTIImpl.h2037 ISD = ISD::FCOPYSIGN; in getTypeBasedIntrinsicInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp88 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break; in SoftenFloatResult()
1029 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break; in SoftenFloatOperand()
1300 return DAG.getNode(ISD::FCOPYSIGN, dl, LVT, LHS, RHS); in SoftenFloatOp_FCOPYSIGN()
1418 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult()
2076 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; in ExpandFloatOperand()
2175 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), in ExpandFloatOp_FCOPYSIGN()
2409 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; in PromoteFloatOperand()
2594 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; in PromoteFloatResult()
3033 case ISD::FCOPYSIGN: R = SoftPromoteHalfRes_FCOPYSIGN(N); break; in SoftPromoteHalfResult()
3398 case ISD::FCOPYSIGN: Res = SoftPromoteHalfOp_FCOPYSIGN(N, OpNo); break; in SoftPromoteHalfOperand()
H A DSelectionDAGDumper.cpp298 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
H A DLegalizeDAG.cpp1716 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS()
1718 return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero); in ExpandFABS()
3596 case ISD::FCOPYSIGN: in ExpandNode()
5493 case ISD::FCOPYSIGN: in PromoteNode()
5505 const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN); in PromoteNode()
H A DLegalizeVectorTypes.cpp144 case ISD::FCOPYSIGN: in ScalarizeVectorResult()
1089 case ISD::FCOPYSIGN: SplitVecRes_FPOp_MultiType(N, Lo, Hi); break; in SplitVectorResult()
3152 case ISD::FCOPYSIGN: Res = SplitVecOp_FPOpDifferentTypes(N); break; in SplitVectorOperand()
4474 case ISD::FCOPYSIGN: in WidenVectorResult()
5261 // If this is an FCOPYSIGN with same input types, we can treat it as a in WidenVecRes_FCOPYSIGN()
6391 case ISD::FCOPYSIGN: in WidenVectorOperand()
H A DLegalizeVectorOps.cpp400 case ISD::FCOPYSIGN: in LegalizeOp()
H A DDAGCombiner.cpp1929 case ISD::FCOPYSIGN: return visitFCOPYSIGN(N); in visit()
15520 if (N0.getOpcode() == ISD::FCOPYSIGN && N0->hasOneUse() && in visitBITCAST()
17499 return NeedsCopySign ? DAG.getNode(ISD::FCOPYSIGN, DL, VT, MLA, N0) : MLA; in visitFREM()
17562 if (SDValue C = DAG.FoldConstantArithmetic(ISD::FCOPYSIGN, DL, VT, {N0, N1})) in visitFCOPYSIGN()
17583 N0.getOpcode() == ISD::FCOPYSIGN) in visitFCOPYSIGN()
17584 return DAG.getNode(ISD::FCOPYSIGN, DL, VT, N0.getOperand(0), N1); in visitFCOPYSIGN()
17591 if (N1.getOpcode() == ISD::FCOPYSIGN) in visitFCOPYSIGN()
17592 return DAG.getNode(ISD::FCOPYSIGN, DL, VT, N0, N1.getOperand(1)); in visitFCOPYSIGN()
17597 return DAG.getNode(ISD::FCOPYSIGN, DL, VT, N0, N1.getOperand(0)); in visitFCOPYSIGN()
17946 if (N0.getOpcode() == ISD::FCOPYSIGN && N0->hasOneUse() && in visitFP_ROUND()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DTargetOpcodes.def680 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This does
682 /// floating point. X and the result must have the same type. FCOPYSIGN(f32,
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp813 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Expand); in NVPTXTargetLowering()
814 setOperationAction(ISD::FCOPYSIGN, MVT::v2f16, Expand); in NVPTXTargetLowering()
815 setOperationAction(ISD::FCOPYSIGN, MVT::bf16, Expand); in NVPTXTargetLowering()
816 setOperationAction(ISD::FCOPYSIGN, MVT::v2bf16, Expand); in NVPTXTargetLowering()
817 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in NVPTXTargetLowering()
818 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in NVPTXTargetLowering()
2627 RoundedA = DAG.getNode(ISD::FCOPYSIGN, SL, VT, RoundedA, A); in LowerFROUND64()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DVPIntrinsics.def399 VP_PROPERTY_FUNCTIONAL_SDOPC(FCOPYSIGN)
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1820 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in SparcTargetLowering()
1821 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in SparcTargetLowering()
1822 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in SparcTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp121 ISD::FREM, ISD::FCOPYSIGN, ISD::FP16_TO_FP, ISD::FP_TO_FP16}; in CSKYTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp539 ISD::FCOPYSIGN, ISD::VECTOR_SHUFFLE, ISD::SETCC, in AMDGPUTargetLowering()
1590 if (Val.getOpcode() == ISD::FCOPYSIGN) in peekFPSignOps()
2459 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src); in LowerFROUNDEVEN()
2521 SDValue SignedOffset = DAG.getNode(ISD::FCOPYSIGN, SL, VT, OneOrZeroFP, X); in LowerFROUND()
H A DSIISelLowering.cpp230 setOperationAction(ISD::FCOPYSIGN, MVT::bf16, Legal); in SITargetLowering()
486 setOperationAction(ISD::FCOPYSIGN, {MVT::f32, MVT::f64}, Expand); in SITargetLowering()
923 ISD::FCOPYSIGN}); in SITargetLowering()
11262 DAG.getNode(ISD::FCOPYSIGN, DL, MVT::f32, MagHi, SignOp); in performFCopySignCombine()
11282 return DAG.getNode(ISD::FCOPYSIGN, DL, N->getValueType(0), N->getOperand(0), in performFCopySignCombine()
12666 case ISD::FCOPYSIGN: in isCanonicalized()
14749 case ISD::FCOPYSIGN: in PerformDAGCombine()
H A DR600ISelLowering.cpp164 setOperationAction(ISD::FCOPYSIGN, {MVT::f32, MVT::f64}, Expand); in R600TargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp358 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in MipsTargetLowering()
359 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in MipsTargetLowering()
1252 case ISD::FCOPYSIGN: return lowerFCOPYSIGN(Op, DAG); in LowerOperation()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp769 {ISD::FCOPYSIGN, ISD::SIGN_EXTEND_INREG, ISD::ANY_EXTEND_VECTOR_INREG, in initActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp537 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in AArch64TargetLowering()
725 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in AArch64TargetLowering()
726 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in AArch64TargetLowering()
728 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Custom); in AArch64TargetLowering()
729 setOperationAction(ISD::FCOPYSIGN, MVT::bf16, Custom); in AArch64TargetLowering()
731 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote); in AArch64TargetLowering()
732 setOperationAction(ISD::FCOPYSIGN, MVT::bf16, Promote); in AArch64TargetLowering()
828 setOperationAction(ISD::FCOPYSIGN, V4Narrow, Custom); in AArch64TargetLowering()
835 setOperationAction(ISD::FCOPYSIGN, V8Narrow, Custom); in AArch64TargetLowering()
1590 setOperationAction(ISD::FCOPYSIGN, VT, Custom); in AArch64TargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp475 // FIXME: Need to promote bf16 FCOPYSIGN to f32, but the in RISCVTargetLowering()
477 setOperationAction(ISD::FCOPYSIGN, MVT::bf16, Expand); in RISCVTargetLowering()
492 // FIXME: Need to promote f16 FCOPYSIGN to f32, but the in RISCVTargetLowering()
494 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Expand); in RISCVTargetLowering()
949 ISD::FABS, ISD::FNEG, ISD::FCOPYSIGN, ISD::FCEIL, in RISCVTargetLowering()
1005 setOperationAction(ISD::FCOPYSIGN, VT, Legal); in RISCVTargetLowering()
1369 ISD::FNEG, ISD::FABS, ISD::FCOPYSIGN, ISD::FSQRT, in RISCVTargetLowering()
1494 setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER, in RISCVTargetLowering()
6017 VP_CASE(FCOPYSIGN) // VP_FCOPYSIGN in getRISCVVLOp()
7075 case ISD::FCOPYSIGN in LowerOperation()
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp452 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Legal); in PPCTargetLowering()
453 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Legal); in PPCTargetLowering()
455 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in PPCTargetLowering()
456 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in PPCTargetLowering()
1139 setOperationAction(ISD::FCOPYSIGN, MVT::v4f32, Legal); in PPCTargetLowering()
1140 setOperationAction(ISD::FCOPYSIGN, MVT::v2f64, Legal); in PPCTargetLowering()
1284 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in PPCTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp262 for (auto Op : {ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, in WebAssemblyTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp249 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in initSPUActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp603 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in X86TargetLowering()
660 setOperationAction(ISD::FCOPYSIGN, VT, Custom); in X86TargetLowering()
738 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in X86TargetLowering()
739 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in X86TargetLowering()
760 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in X86TargetLowering()
815 setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand); in X86TargetLowering()
894 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Custom); in X86TargetLowering()
962 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in X86TargetLowering()
1052 setOperationAction(ISD::FCOPYSIGN, MVT::v4f32, Custom); in X86TargetLowering()
1122 setOperationAction(ISD::FCOPYSIGN, MVT::v2f64, Custom); in X86TargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td554 def fcopysign : SDNode<"ISD::FCOPYSIGN" , SDTFPSignOp>;

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