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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrConv.td78 defm I32_TRUNC_S_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
79 [(set I32:$dst, (fp_to_sint F64:$src))],
83 defm I32_TRUNC_U_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
84 [(set I32:$dst, (fp_to_uint F64:$src))],
88 defm I64_TRUNC_S_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
89 [(set I64:$dst, (fp_to_sint F64:$src))],
93 defm I64_TRUNC_U_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
94 [(set I64:$dst, (fp_to_uint F64:$src))],
102 def : Pat<(fp_to_sint_sat F64:$src, i32), (I32_TRUNC_S_SAT_F64 F64:$src)>;
103 def : Pat<(fp_to_uint_sat F64:$src, i32), (I32_TRUNC_U_SAT_F64 F64:$src)>;
[all …]
H A DWebAssemblyInstrFloat.td20 defm _F64 : I<(outs F64:$dst), (ins F64:$src), (outs), (ins),
21 [(set F64:$dst, (node F64:$src))],
31 defm _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
32 [(set F64:$dst, (node F64:$lhs, F64:$rhs))],
41 defm _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
42 [(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))],
70 def : Pat<(fcopysign F64:$lhs, F32:$rhs),
71 (COPYSIGN_F64 F64:$lhs, (F64_PROMOTE_F32 F32:$rhs))>;
72 def : Pat<(fcopysign F32:$lhs, F64:$rhs),
73 (COPYSIGN_F32 F32:$lhs, (F32_DEMOTE_F64 F64:$rhs))>;
[all …]
H A DWebAssemblyRuntimeLibcallSignatures.cpp569 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
584 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
588 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
589 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
592 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
596 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
605 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
617 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
644 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
645 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
[all …]
H A DWebAssemblyInstrInfo.td304 defm "": ARGUMENT<F64, f64>;
387 defm "" : LOCAL<F64, global_op32>;
407 defm CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm),
409 [(set F64:$res, fpimm:$imm)],
H A DWebAssemblyInstrMemory.td61 defm LOAD_F64 : WebAssemblyLoad<F64, "f64.load", 0x2b, []>;
146 defm STORE_F64 : WebAssemblyStore<F64, "f64.store", 0x39>;
H A DWebAssemblyRegisterInfo.td66 def F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>;
/freebsd/tools/tools/nanobsd/rescue/
H A Dbuild.sh29 F64="/usr/obj/Rescue/rescue_${today}_x64"
32 cp "${D64}/_.disk.full" "${F64}.img"
35 cp "${D64}/_.disk.iso" "${F64}.iso"
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyMCTypeUtilities.cpp25 .Case("f64", wasm::ValType::F64) in parseType()
40 .Case("f64", WebAssembly::BlockType::F64) in parseBlockType()
110 return wasm::ValType::F64; in regClassToValType()
H A DWebAssemblyMCTypeUtilities.h31 F64 = unsigned(wasm::ValType::F64), enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td455 def: OpR_R_pat<F2_conv_df2sf, pf1<fpround>, f32, F64>;
468 def: OpR_R_pat<F2_conv_df2w_chop, pf1<fp_to_sint>, i32, F64>;
470 def: OpR_R_pat<F2_conv_df2d_chop, pf1<fp_to_sint>, i64, F64>;
473 def: OpR_R_pat<F2_conv_df2uw_chop, pf1<fp_to_uint>, i32, F64>;
475 def: OpR_R_pat<F2_conv_df2ud_chop, pf1<fp_to_uint>, i64, F64>;
480 def: Pat<(i64 (bitconvert F64:$v)), (I64:$v)>;
481 def: Pat<(f64 (bitconvert I64:$v)), (F64:$v)>;
740 def: OpR_RR_pat<F2_dfcmpeq, seteq, i1, F64>;
741 def: OpR_RR_pat<F2_dfcmpgt, setgt, i1, F64>;
742 def: OpR_RR_pat<F2_dfcmpge, setge, i1, F64>;
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DDXILABI.h69 F64, enumerator
H A DAMDGPUMetadata.h114 F64 = 11, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedNeoverseV1.td1008 // ASIMD FP convert, long (F32 to F64)
1014 // ASIMD FP convert, narrow (F64 to F32)
1018 // ASIMD FP convert, other, D-form F32 and Q-form F64
1060 // ASIMD FP divide, Q-form, F64
1066 // ASIMD FP square root, Q-form, F64
1075 // ASIMD FP round, D-form F32 and Q-form F64
1132 // ASIMD reciprocal and square root estimate, D-form F32 and F64
1139 // ASIMD reciprocal and square root estimate, D-form F16 and Q-form F32 and F64
1692 // Floating point associative add, F64
1712 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32 or F64 to F16)
[all …]
H A DAArch64SchedNeoverseN2.td1108 // ASIMD FP convert, long (F32 to F64)
1114 // ASIMD FP convert, narrow (F64 to F32)
1118 // ASIMD FP convert, other, D-form F32 and Q-form F64
1142 // ASIMD FP divide, Q-form, F64
1160 // ASIMD FP round, D-form F32 and Q-form F64
1186 // ASIMD FP square root, Q-form, F64
1977 // Floating point associative add, F64
1998 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32
1999 // or F64 to F16)
2013 // Floating point base2 log, F64
[all …]
H A DAArch64SchedNeoverseN3.td1066 // ASIMD FP convert, long (F32 to F64)
1072 // ASIMD FP convert, narrow (F64 to F32)
1076 // ASIMD FP convert, other, D-form F32 and Q-form F64
1103 // ASIMD FP divide, Q-form, F64
1125 // ASIMD FP round, D-form F32 and Q-form F64
1150 // ASIMD FP square root, Q-form, F64
1940 // Floating point associative add, F64
1960 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32 or F64 to F16)
1974 // Floating point base2 log, F64
1983 // Floating point convert to integer, F64
[all …]
H A DAArch64SchedA510.td1015 // Floating point associative add, F64
1036 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32
1037 // or F64 to F16)
1051 // Floating point base2 log, F64
1060 // Floating point convert to integer, F64
1074 // Floating point divide, F64
1102 // Floating point reciprocal estimate, F64
1130 // Floating point round to integral, F64
1139 // Floating point square root, F64
H A DAArch64SchedA320.td1037 // Floating point associative add, F64
1058 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32
1059 // or F64 to F16)
1073 // Floating point base2 log, F64
1082 // Floating point convert to integer, F64
1096 // Floating point divide, F64
1124 // Floating point reciprocal estimate, F64
1152 // Floating point round to integral, F64
1161 // Floating point square root, F64
H A DAArch64SchedNeoverseV2.td1569 // ASIMD FP convert, long (F32 to F64)
1575 // ASIMD FP convert, narrow (F64 to F32)
1579 // ASIMD FP convert, other, D-form F32 and Q-form F64
1621 // ASIMD FP divide, Q-form, F64
1639 // ASIMD FP round, D-form F32 and Q-form F64
1664 // ASIMD FP square root, Q-form, F64
2470 // Floating point associative add, F64
2491 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32
2492 // or F64 to F16)
2506 // Floating point base2 log, F64
[all …]
H A DAArch64SchedNeoverseN1.td675 // ASIMD FP convert, long (F32 to F64)
681 // ASIMD FP convert, narrow (F64 to F32)
685 // ASIMD FP convert, other, D-form F32 and Q-form F64
713 // ASIMD FP divide, Q-form, F64
716 // ASIMD FP square root, Q-form, F64
734 // ASIMD FP round, D-form F32 and Q-form F64
771 // ASIMD reciprocal and square root estimate, D-form F32 and F64
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp49 return wasm::ValType::F64; in toValType()
/freebsd/contrib/llvm-project/llvm/lib/Demangle/
H A DRustDemangle.cpp56 F64, enumerator
398 Type = BasicType::F64; in parseBasicType()
503 case BasicType::F64: in printBasicType()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp291 constexpr LLT F64 = LLT::float64(); variable
1709 .legalFor({{F32, LocalPtr}, {F64, LocalPtr}}); in AMDGPULegalizerInfo()
1714 AtomicFMinFMax.legalFor({{F64, GlobalPtr}, {F64, BufferFatPtr}}); in AMDGPULegalizerInfo()
1718 AtomicFMinFMax.legalFor({F64, FlatPtr}); in AMDGPULegalizerInfo()
3839 const LLT F64 = LLT::float64(); in legalizeFFloor() local
3843 assert(ST.hasFractBug() && MRI.getType(Dst) == F64 && in legalizeFFloor()
3854 auto Fract = B.buildIntrinsic(Intrinsic::amdgcn_fract, {F64}) in legalizeFFloor()
3866 B.buildFConstant(F64, llvm::bit_cast<double>(0x3fefffffffffffff)); in legalizeFFloor()
3868 Register Min = MRI.createGenericVirtualRegister(F64); in legalizeFFloor()
3881 CorrectedFract = B.buildSelect(F64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
[all …]
H A DAMDGPULibFunc.cpp646 case 'd': res.ArgType = AMDGPULibFunc::F64; break; in parseItaniumParam()
753 case AMDGPULibFunc::F64: return "d"; in getItaniumTypeName()
901 P.ArgType = AMDGPULibFunc::F64; in getFromTy()
961 case AMDGPULibFunc::F64: in getIntrinsicParamType()
H A DAMDGPULibCalls.cpp494 getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId()) || in useNative()
1246 if (getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId())) in getNativeFunction()
1356 getArgType(fInfo) != AMDGPULibFunc::F64) || in fold_sincos()
1473 opr0 = (getArgType(FInfo) == AMDGPULibFunc::F64) in evaluateScalarMathFunc()
1479 opr1 = (getArgType(FInfo) == AMDGPULibFunc::F64) in evaluateScalarMathFunc()
/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXILPrettyPrinter.cpp71 case dxil::ElementType::F64: in getFormatName()

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