| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedNeoverseN1.td | 672 // ASIMD FP convert, long (F16 to F32) 678 // ASIMD FP convert, narrow (F32 to F16) 689 // ASIMD FP convert, other, D-form F16 and Q-form F32 693 // ASIMD FP convert, other, Q-form F16 697 // ASIMD FP divide, D-form, F16 698 // ASIMD FP square root, D-form, F16 705 // ASIMD FP divide, Q-form, F16 706 // ASIMD FP square root, Q-form, F16 719 // ASIMD FP max/min, reduce, F32 and D-form F16 722 // ASIMD FP max/min, reduce, Q-form F16 [all...] |
| H A D | AArch64SchedNeoverseV1.td | 1005 // ASIMD FP convert, long (F16 to F32) 1011 // ASIMD FP convert, narrow (F32 to F16) 1028 // ASIMD FP convert, other, D-form F16 and Q-form F32 1038 // ASIMD FP convert, other, Q-form F16 1048 // ASIMD FP divide, D-form, F16 1049 // ASIMD FP square root, D-form, F16 1057 // ASIMD FP divide, Q-form, F16 1063 // ASIMD FP square root, Q-form, F16 1069 // ASIMD FP max/min, reduce, F32 and D-form F16 1072 // ASIMD FP max/min, reduce, Q-form F16 [all …]
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| H A D | AArch64SchedNeoverseN2.td | 1105 // ASIMD FP convert, long (F16 to F32) 1111 // ASIMD FP convert, narrow (F32 to F16) 1122 // ASIMD FP convert, other, D-form F16 and Q-form F32 1126 // ASIMD FP convert, other, Q-form F16 1130 // ASIMD FP divide, D-form, F16 1136 // ASIMD FP divide, Q-form, F16 1145 // ASIMD FP max/min, reduce, F32 and D-form F16 1148 // ASIMD FP max/min, reduce, Q-form F16 1165 // ASIMD FP round, D-form F16 and Q-form F32 1171 // ASIMD FP round, Q-form F16 [all …]
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| H A D | AArch64SchedNeoverseN3.td | 1063 // ASIMD FP convert, long (F16 to F32) 1069 // ASIMD FP convert, narrow (F32 to F16) 1080 // ASIMD FP convert, other, D-form F16 and Q-form F32 1084 // ASIMD FP convert, other, Q-form F16 1091 // ASIMD FP divide, D-form, F16 1097 // ASIMD FP divide, Q-form, F16 1110 // ASIMD FP max/min, reduce, F32 and D-form F16 1113 // ASIMD FP max/min, reduce, Q-form F16 1130 // ASIMD FP round, D-form F16 and Q-form F32 1135 // ASIMD FP round, Q-form F16 [all …]
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| H A D | AArch64SchedNeoverseV2.td | 1566 // ASIMD FP convert, long (F16 to F32) 1572 // ASIMD FP convert, narrow (F32 to F16) 1589 // ASIMD FP convert, other, D-form F16 and Q-form F32 1599 // ASIMD FP convert, other, Q-form F16 1609 // ASIMD FP divide, D-form, F16 1615 // ASIMD FP divide, Q-form, F16 1624 // ASIMD FP max/min, reduce, F32 and D-form F16 1627 // ASIMD FP max/min, reduce, Q-form F16 1644 // ASIMD FP round, D-form F16 and Q-form F32 1649 // ASIMD FP round, Q-form F16 [all …]
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| H A D | AArch64SchedA510.td | 1009 // Floating point associative add, F16 1031 // Floating point convert, long or narrow (F16 to F32 or F32 to F16) 1036 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32 1037 // or F64 to F16) 1045 // Floating point base2 log, F16 1054 // Floating point convert to integer, F16 1068 // Floating point divide, F16 1095 // Floating point reciprocal estimate, F16 1109 // Floating point reduction, F16 1124 // Floating point round to integral, F16 [all …]
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| H A D | AArch64SchedA320.td | 1031 // Floating point associative add, F16 1053 // Floating point convert, long or narrow (F16 to F32 or F32 to F16) 1058 // Floating point convert, long or narrow (F16 to F64, F32 to F64, F64 to F32 1059 // or F64 to F16) 1067 // Floating point base2 log, F16 1076 // Floating point convert to integer, F16 1090 // Floating point divide, F16 1117 // Floating point reciprocal estimate, F16 1131 // Floating point reduction, F16 1146 // Floating point round to integral, F16 [all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | DXILABI.h | 67 F16, enumerator
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| H A D | AMDGPUMetadata.h | 108 F16 = 5, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 192 def F16 : Rf<16, "f16">, DwarfRegNum<[48]>; 218 def D8 : Rd<16, "f16", [F16, F17]>, DwarfRegNum<[80]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.td | 643 def IJMP : F16<0b1001010000001001, (outs), (ins), "ijmp", []>, 647 def EIJMP : F16<0b1001010000011001, (outs), (ins), "eijmp", []>, 667 def ICALL : F16<0b1001010100001001, (outs), (ins variable_ops), "icall", []>, 673 def EICALL : F16<0b1001010100011001, (outs), (ins variable_ops), "eicall", 692 def RET : F16<0b1001010100001000, (outs), (ins), "ret", [(AVRretglue)]>; 694 def RETI : F16<0b1001010100011000, (outs), (ins), "reti", [(AVRretiglue)]>; 1158 : F16<0b1001010111001000, (outs), (ins), "lpm", []>, 1189 def ELPM : F16<0b1001010111011000, (outs), (ins), "elpm", []>, 1228 def SPM : F16<0b1001010111101000, (outs), (ins), "spm", []>, 1232 def SPMZPi : F16<0b1001010111111000, (outs), (ins ZREG:$z), "spm $z+", []>, [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am68-sk-som.dtsi | 51 J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
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| H A D | k3-am68-phycore-som.dtsi | 125 J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
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| H A D | k3-j721s2-som-p0.dtsi | 97 J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULibFunc.cpp | 648 res.ArgType = AMDGPULibFunc::F16; break; in parseItaniumParam() 751 case AMDGPULibFunc::F16: return "Dh"; in getItaniumTypeName() 904 P.ArgType = AMDGPULibFunc::F16; in getFromTy() 955 case AMDGPULibFunc::F16: in getIntrinsicParamType()
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| H A D | AMDGPULibFunc.h | 272 F16 = FLOAT | B16, enumerator
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| H A D | SISchedule.td | 34 // F16 or F32 transcendental instructions (these are quarter rate) 72 // F16 or F32 pseudo scalar transcendental instructions
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallingConv.td | 153 F16, F17, F18, F19], 283 F14, F15, F16, F17, F18, F19]>>>, 287 CCAssignToReg<[F0, F2, F4, F6, F8, F10, F12, F14, F16, F18]>>>,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.td | 304 def CSR_SVR432 : CalleeSavedRegs<(add CSR_SVR432_COMM, F14, F15, F16, F17, F18, 324 R29, R30, R31, F14, F15, F16, F17, F18, 334 X29, X30, X31, F14, F15, F16, F17, F18,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILPrettyPrinter.cpp | 67 case dxil::ElementType::F16: in getFormatName()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | DXILResource.cpp | 107 case ElementType::F16: in getElementTypeName() 151 case ElementType::F16: in getElementTypeNameForTemplate() 216 return ElementType::F16; in toDXILElementType()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCTargetDesc.cpp | 107 {codeview::RegisterId::MIPS_F16, Mips::F16}, in initLLVMToCVRegMapping()
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | AMDGPUMetadata.cpp | 82 YIO.enumCase(EN, "F16", ValueType::F16); in enumeration()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchRegisterInfo.td | 154 def F16 : LoongArchReg32<16,"f16", ["ft8"]>, DwarfRegNum<[48]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 76 SP::F16, SP::F17, SP::F18, SP::F19,
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