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Searched refs:ExtendOpcode (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInstructionSelector.cpp114 MachineInstr &I, unsigned ExtendOpcode,
3470 unsigned ExtendOpcode, unsigned BitSetOpcode) const { in selectFirstBitSet16() argument
3473 ExtendOpcode); in selectFirstBitSet16()
3722 unsigned ExtendOpcode = IsSigned ? SPIRV::OpSConvert : SPIRV::OpUConvert; in selectFirstBitHigh() local
3727 return selectFirstBitSet16(ResVReg, ResType, I, ExtendOpcode, BitSetOpcode); in selectFirstBitHigh()
3748 unsigned ExtendOpcode = SPIRV::OpUConvert; in selectFirstBitLow() local
3753 return selectFirstBitSet16(ResVReg, ResType, I, ExtendOpcode, BitSetOpcode); in selectFirstBitLow()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCombinerHelper.h52 unsigned ExtendOpcode; // G_ANYEXT/G_SEXT/G_ZEXT member
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp665 if (CurrentUse.ExtendOpcode == OpcodeForCandidate || in ChoosePreferredUse()
666 CurrentUse.ExtendOpcode == TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
679 CurrentUse.ExtendOpcode != TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
681 else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ANYEXT && in ChoosePreferredUse()
690 if (CurrentUse.ExtendOpcode == TargetOpcode::G_SEXT && in ChoosePreferredUse()
693 else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ZEXT && in ChoosePreferredUse()
873 unsigned LoadOpc = getExtLoadOpcForExtend(Preferred.ExtendOpcode); in applyCombineExtendingLoads()
886 if (UseMI->getOpcode() == Preferred.ExtendOpcode || in applyCombineExtendingLoads()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18662 unsigned ExtendOpcode = Extend.getOpcode(); in performBuildShuffleExtendCombine() local
18663 bool IsAnyExt = ExtendOpcode == ISD::ANY_EXTEND; in performBuildShuffleExtendCombine()
18664 bool IsSExt = ExtendOpcode == ISD::SIGN_EXTEND || in performBuildShuffleExtendCombine()
18665 ExtendOpcode == ISD::SIGN_EXTEND_INREG || in performBuildShuffleExtendCombine()
18666 ExtendOpcode == ISD::AssertSext; in performBuildShuffleExtendCombine()
18667 if (!IsAnyExt && !IsSExt && ExtendOpcode != ISD::ZERO_EXTEND && in performBuildShuffleExtendCombine()
18668 ExtendOpcode != ISD::AssertZext && ExtendOpcode != ISD::AND) in performBuildShuffleExtendCombine()
18673 ExtendOpcode != ISD::SIGN_EXTEND && ExtendOpcode != ISD::ZERO_EXTEND) in performBuildShuffleExtendCombine()
29032 unsigned ExtendOpcode = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerFixedLengthVectorIntDivideToSVE() local
29037 SDValue Op0 = DAG.getNode(ExtendOpcode, DL, WideVT, Op.getOperand(0)); in LowerFixedLengthVectorIntDivideToSVE()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp7019 ISD::NodeType ExtendOpcode = in WidenVecOp_CMP() local
7021 LHS = DAG.getNode(ExtendOpcode, dl, ResVT, LHS); in WidenVecOp_CMP()
7022 RHS = DAG.getNode(ExtendOpcode, dl, ResVT, RHS); in WidenVecOp_CMP()
H A DDAGCombiner.cpp13038 auto ExtendOpcode = AllAddOne ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND; in foldVSelectOfConstants() local
13039 SDValue ExtendedCond = DAG.getNode(ExtendOpcode, DL, VT, Cond); in foldVSelectOfConstants()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp55688 unsigned ExtendOpcode = Extend->getOpcode(); in combineToExtendCMOV() local
55705 if (VT != MVT::i16 && !(ExtendOpcode == ISD::SIGN_EXTEND && VT == MVT::i32)) in combineToExtendCMOV()
55711 if (TargetVT == MVT::i64 && ExtendOpcode != ISD::SIGN_EXTEND) in combineToExtendCMOV()
55714 CMovOp0 = DAG.getNode(ExtendOpcode, DL, ExtendVT, CMovOp0); in combineToExtendCMOV()
55715 CMovOp1 = DAG.getNode(ExtendOpcode, DL, ExtendVT, CMovOp1); in combineToExtendCMOV()
55722 Res = DAG.getNode(ExtendOpcode, DL, TargetVT, Res); in combineToExtendCMOV()