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Searched refs:ExtType (Results 1 – 25 of 55) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h60 struct ExtType { struct
63 ExtType() = default;
64 ExtType(char t, uint16_t w) : Type(t), Width(w) {} in ExtType() argument
70 using RegExtMap = DenseMap<unsigned, ExtType>;
H A DHexagonBitTracker.cpp73 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width))); in HexagonEvaluator()
75 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::ZExt, Width))); in HexagonEvaluator()
1233 if (F->second.Type == ExtType::SExt) in evaluateFormalCopy()
1235 else if (F->second.Type == ExtType::ZExt) in evaluateFormalCopy()
H A DHexagonISelDAGToDAG.cpp86 ISD::LoadExtType ExtType = LD->getExtensionType(); in INITIALIZE_PASS() local
87 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in INITIALIZE_PASS()
141 auto getExt64 = [this,ExtType] (MachineSDNode *N, const SDLoc &dl) in INITIALIZE_PASS()
143 if (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD) { in INITIALIZE_PASS()
148 if (ExtType == ISD::SEXTLOAD) in INITIALIZE_PASS()
159 if (ValueVT == MVT::i64 && ExtType != ISD::NON_EXTLOAD) { in INITIALIZE_PASS()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFragments.td509 ISD::LoadExtType ExtType = LD->getExtensionType();
510 return ExtType == ISD::NON_EXTLOAD || ExtType == ISD::EXTLOAD ||
511 ExtType == ISD::ZEXTLOAD;
520 ISD::LoadExtType ExtType = LD->getExtensionType();
521 if (ExtType == ISD::NON_EXTLOAD)
523 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
539 ISD::LoadExtType ExtType = LD->getExtensionType();
540 if (ExtType == ISD::NON_EXTLOAD)
542 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
604 ISD::LoadExtType ExtType = LD->getExtensionType();
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1469 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
1474 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::VALUETYPE_SIZE && in getLoadExtAction()
1476 unsigned Shift = 4 * ExtType; in getLoadExtAction()
1481 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1482 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1487 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegalOrCustom() argument
1488 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
1489 getLoadExtAction(ExtType, ValVT, MemVT) == Custom; in isLoadExtLegalOrCustom()
1493 LegalizeAction getAtomicLoadExtAction(unsigned ExtType, EVT ValVT, in getAtomicLoadExtAction() argument
1498 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::VALUETYPE_SIZE && in getAtomicLoadExtAction()
[all …]
H A DSelectionDAG.h1390 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD);
1392 LLVM_ABI SDValue getAtomicLoad(ISD::LoadExtType ExtType, const SDLoc &dl,
1456 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain,
1461 LLVM_ABI SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1468 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
1474 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
1480 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1484 LLVM_ABI SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
1534 LLVM_ABI SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
1543 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td558 ISD::LoadExtType ExtType = LD->getExtensionType();
559 if (ExtType == ISD::NON_EXTLOAD)
561 if (ExtType == ISD::EXTLOAD)
568 ISD::LoadExtType ExtType = LD->getExtensionType();
569 if (ExtType == ISD::NON_EXTLOAD)
571 if (ExtType == ISD::EXTLOAD)
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp389 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_Atomic0() local
390 if (ExtType == ISD::NON_EXTLOAD) { in PromoteIntRes_Atomic0()
393 ExtType = ISD::SEXTLOAD; in PromoteIntRes_Atomic0()
396 ExtType = ISD::ZEXTLOAD; in PromoteIntRes_Atomic0()
399 ExtType = ISD::EXTLOAD; in PromoteIntRes_Atomic0()
407 DAG.getAtomicLoad(ExtType, SDLoc(N), N->getMemoryVT(), ResVT, in PromoteIntRes_Atomic0()
968 ISD::LoadExtType ExtType = in PromoteIntRes_LOAD() local
971 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD()
983 ISD::LoadExtType ExtType = (N->getExtensionType() == ISD::NON_EXTLOAD) in PromoteIntRes_VP_LOAD() local
988 DAG.getExtLoadVP(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_VP_LOAD()
[all …]
H A DLegalizeVectorTypes.cpp2110 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD() local
2129 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
2136 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, MPI, in SplitVecRes_LOAD()
2156 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_VP_LOAD() local
2192 DAG.getLoadVP(LD->getAddressingMode(), ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_VP_LOAD()
2215 Hi = DAG.getLoadVP(LD->getAddressingMode(), ExtType, HiVT, dl, Ch, Ptr, in SplitVecRes_VP_LOAD()
2325 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD() local
2356 MMO, MLD->getAddressingMode(), ExtType, in SplitVecRes_MLOAD()
2380 HiMemVT, MMO, MLD->getAddressingMode(), ExtType, in SplitVecRes_MLOAD()
2451 ISD::LoadExtType ExtType = MGT->getExtensionType(); in SplitVecRes_Gather() local
[all …]
H A DSelectionDAG.cpp590 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType() argument
591 switch (ExtType) { in getExtForLoadExtType()
5331 unsigned ExtType = LD->getExtensionType(); in ComputeNumSignBits() local
5332 switch (ExtType) { in ComputeNumSignBits()
9216 ISD::LoadExtType ExtType) { in getAtomic() argument
9221 dl.getIROrder(), Opcode, VTList, MemVT, MMO, ExtType)); in getAtomic()
9232 VTList, MemVT, MMO, ExtType); in getAtomic()
9282 SDValue SelectionDAG::getAtomicLoad(ISD::LoadExtType ExtType, const SDLoc &dl, in getAtomicLoad() argument
9287 return getAtomic(ISD::ATOMIC_LOAD, dl, MemVT, VTs, Ops, MMO, ExtType); in getAtomicLoad()
9453 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad() argument
[all …]
H A DLegalizeDAG.cpp671 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeLoadOps() local
672 if (ExtType == ISD::NON_EXTLOAD) { in LegalizeLoadOps()
745 TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) == in LegalizeLoadOps()
757 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
765 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
770 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType()) in LegalizeLoadOps()
807 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps()
828 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps()
858 switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0), in LegalizeLoadOps()
893 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT))) { in LegalizeLoadOps()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1289 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getArithExtendType(Val); in printArithExtend() local
1295 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend()
1299 ExtType == AArch64_AM::UXTX) || in printArithExtend()
1301 ExtType == AArch64_AM::UXTW) ) { in printArithExtend()
1309 O << ", " << AArch64_AM::getShiftExtendName(ExtType); in printArithExtend()
/freebsd/contrib/llvm-project/clang/lib/Serialization/
H A DASTCommon.cpp221 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in TypeIdxFromBuiltin() argument
/freebsd/contrib/llvm-project/clang/lib/Index/
H A DUSRGeneration.cpp751 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in VisitType() argument
753 Out << "@BT@" << #ExtType; break; in VisitType()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp273 ISD::LoadExtType ExtType; in unpackFromMemLoc() local
279 ExtType = ISD::NON_EXTLOAD; in unpackFromMemLoc()
283 ExtType, DL, LocVT, Chain, FIN, in unpackFromMemLoc()
/freebsd/contrib/llvm-project/clang/include/clang/Serialization/
H A DASTBitCodes.h1128 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) PREDEF_TYPE_##Id##_ID, argument
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DNSAPI.cpp438 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getNSNumberFactoryMethodKind() argument
H A DTypeLoc.cpp414 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getWrittenTypeSpec() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1269 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad() local
1306 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1325 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD() local
1328 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
H A DAMDGPUISelLowering.h221 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtType, EVT ExtVT,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVectorCombine.cpp1371 auto *ExtType = cast<VectorType>(RedOp->getOperand(0)->getType()); in analyzeCostOfVecReduction() local
1374 TTI.getCastInstrCost(RedOp->getOpcode(), VecRedTy, ExtType, in analyzeCostOfVecReduction()
1378 ExtType, FastMathFlags(), CostKind); in analyzeCostOfVecReduction()
1390 auto *ExtType = cast<VectorType>(Op0->getOperand(0)->getType()); in analyzeCostOfVecReduction() local
1394 TTI.getCastInstrCost(Op0->getOpcode(), MulType, ExtType, in analyzeCostOfVecReduction()
1404 TTI.getMulAccReductionCost(IsUnsigned, II.getType(), ExtType, CostKind); in analyzeCostOfVecReduction()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPreLegalizer.cpp99 SPIRVType *ExtType = GR->getOrCreateSPIRVType( in addConstantsToTrack() local
104 GR->getSPIRVTypeID(ExtType), false)); in addConstantsToTrack()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp280 enum ExtType { enum
299 using TypeIsSExt = PointerIntPair<Type *, 2, ExtType>;
4715 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst()
4737 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType()
7837 Instruction::CastOps ExtType = Instruction::ZExt; in optimizeSwitchType() local
7840 ExtType = Instruction::SExt; in optimizeSwitchType()
7844 ExtType = Instruction::SExt; in optimizeSwitchType()
7846 ExtType = Instruction::ZExt; in optimizeSwitchType()
7849 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType); in optimizeSwitchType()
7855 APInt WideConst = (ExtType == Instruction::ZExt) in optimizeSwitchType()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp91 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::InvalidShiftExtend; member in __anon53fc71c20111::AArch64FastISel::Address
106 void setExtendType(AArch64_AM::ShiftExtendType E) { ExtType = E; } in setExtendType()
107 AArch64_AM::ShiftExtendType getExtendType() const { return ExtType; } in getExtendType()
212 Register RHSReg, AArch64_AM::ShiftExtendType ExtType,
1420 AArch64_AM::ShiftExtendType ExtType, in emitAddSub_rx() argument
1458 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCodeGenTypes.cpp501 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in ConvertType() argument

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