Searched refs:ExtR (Results 1 – 3 of 3) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonConstExtenders.cpp | 406 bool replaceInstrExact(const ExtDesc &ED, Register ExtR); 408 Register ExtR, int32_t &Diff); 409 bool replaceInstr(unsigned Idx, Register ExtR, const ExtenderInit &ExtI); 1606 bool HCE::replaceInstrExact(const ExtDesc &ED, Register ExtR) { in replaceInstrExact() argument 1624 .add(MachineOperand(ExtR)) in replaceInstrExact() 1629 .add(MachineOperand(ExtR)) in replaceInstrExact() 1643 .add(MachineOperand(ExtR)) in replaceInstrExact() 1657 MIB.add(MachineOperand(ExtR)); in replaceInstrExact() 1704 MIB.add(MachineOperand(ExtR)); // RegOff in replaceInstrExact() 1724 Register ExtR, int32_t &Diff) { in replaceInstrExpr() argument [all …]
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H A D | HexagonVExtract.cpp | 174 Register ExtR = ExtI->getOperand(0).getReg(); in runOnMachineFunction() local 175 MRI.replaceRegWith(ExtR, ElemR); in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 25812 SDValue ExtR = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, R, Index); in visitVECTOR_SHUFFLE() local 25814 DAG.getNode(N0.getOpcode(), DL, EltVT, ExtL, ExtR, N0->getFlags()); in visitVECTOR_SHUFFLE()
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