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Searched refs:ExtOpc (Results 1 – 18 of 18) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonConstExtenders.cpp391 bool isRegOffOpcode(unsigned ExtOpc) const ;
392 unsigned getRegOffOpcode(unsigned ExtOpc) const;
393 unsigned getDirectRegReplacement(unsigned ExtOpc) const;
866 unsigned HCE::getRegOffOpcode(unsigned ExtOpc) const { in getRegOffOpcode()
870 switch (ExtOpc) { in getRegOffOpcode()
875 const MCInstrDesc &D = HII->get(ExtOpc); in getRegOffOpcode()
883 switch (ExtOpc) { in getRegOffOpcode()
956 if (!isStoreImmediate(ExtOpc)) in getRegOffOpcode()
957 return ExtOpc; in getRegOffOpcode()
966 unsigned HCE::getDirectRegReplacement(unsigned ExtOpc) const { in getDirectRegReplacement()
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H A DHexagonBitSimplify.cpp2543 unsigned ExtOpc = 0; in simplifyExtractLow() local
2546 ExtOpc = Signed ? Hexagon::A2_sxtb : Hexagon::A2_zxtb; in simplifyExtractLow()
2548 ExtOpc = Signed ? Hexagon::A2_sxth : Hexagon::A2_zxth; in simplifyExtractLow()
2550 ExtOpc = Hexagon::A2_andir; in simplifyExtractLow()
2552 if (ExtOpc == 0) { in simplifyExtractLow()
2553 ExtOpc = in simplifyExtractLow()
2565 if (!validateReg({R,SR}, ExtOpc, 1)) in simplifyExtractLow()
2569 if (MI->getOpcode() == ExtOpc) { in simplifyExtractLow()
2581 auto MIB = BuildMI(B, At, DL, HII.get(ExtOpc), NewR) in simplifyExtractLow()
2583 switch (ExtOpc) { in simplifyExtractLow()
H A DHexagonISelLoweringHVX.cpp1585 unsigned ExtOpc = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in resizeToWidth()
1586 return DAG.getNode(ExtOpc, dl, ResTy, VecV); in resizeToWidth() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PreLegalizerCombiner.cpp422 auto ExtOpc = ExtMI->getOpcode(); in matchExtUaddvToUaddlv() local
424 if (ExtOpc == TargetOpcode::G_ZEXT) in matchExtUaddvToUaddlv()
426 else if (ExtOpc == TargetOpcode::G_SEXT) in matchExtUaddvToUaddlv()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp547 MachineInstrBuilder MachineIRBuilder::buildExtOrTrunc(unsigned ExtOpc, in buildExtOrTrunc() argument
550 assert((TargetOpcode::G_ANYEXT == ExtOpc || TargetOpcode::G_ZEXT == ExtOpc || in buildExtOrTrunc()
551 TargetOpcode::G_SEXT == ExtOpc) && in buildExtOrTrunc()
561 Opcode = ExtOpc; in buildExtOrTrunc()
H A DLegalizerHelper.cpp2460 unsigned ExtOpc = MI.getOpcode() == TargetOpcode::G_CTTZ || in widenScalar() local
2464 auto MIBSrc = MIRBuilder.buildInstr(ExtOpc, {WideTy}, {SrcReg}); in widenScalar()
2754 unsigned ExtOpc = LI.getExtOpcodeForWideningConstant( in widenScalar() local
2756 assert((ExtOpc == TargetOpcode::G_ZEXT || ExtOpc == TargetOpcode::G_SEXT || in widenScalar()
2757 ExtOpc == TargetOpcode::G_ANYEXT) && in widenScalar()
2760 const APInt &Val = (ExtOpc == TargetOpcode::G_SEXT) in widenScalar()
H A DCombinerHelper.cpp686 static unsigned getExtLoadOpcForExtend(unsigned ExtOpc) { in getExtLoadOpcForExtend() argument
688 switch (ExtOpc) { in getExtLoadOpcForExtend()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp3540 Instruction::CastOps ExtOpc = Instruction::CastOps::CastOpsEnd; in visitCallInst() local
3542 ExtOpc = cast<CastInst>(Arg)->getOpcode(); in visitCallInst()
3544 (ExtOpc == Instruction::CastOps::ZExt)) in visitCallInst()
3548 Res = Builder.CreateCast(ExtOpc, Res, II->getType()); in visitCallInst()
H A DInstCombineCompares.cpp7548 unsigned ExtOpc = ExtI->getOpcode(); in visitICmpInst() local
7550 if ((ExtOpc == Instruction::ZExt && ShiftOpc == Instruction::LShr) || in visitICmpInst()
7551 (ExtOpc == Instruction::SExt && ShiftOpc == Instruction::AShr)) { in visitICmpInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp1899 unsigned ExtOpc, in extendLow32IntoHigh32() argument
1902 if (ExtOpc == AMDGPU::G_ZEXT) { in extendLow32IntoHigh32()
1904 } else if (ExtOpc == AMDGPU::G_SEXT) { in extendLow32IntoHigh32()
1916 assert(ExtOpc == AMDGPU::G_ANYEXT && "not an integer extension"); in extendLow32IntoHigh32()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp4323 unsigned ExtOpc = in lowerScalarSplat()
4325 Scalar = DAG.getNode(ExtOpc, DL, XLenVT, Scalar); in lowerScalarSplat()
4390 unsigned ExtOpc = in lowerScalarInsert()
4392 Scalar = DAG.getNode(ExtOpc, DL, XLenVT, Scalar); in lowerScalarInsert()
8804 unsigned ExtOpc = in lowerVectorIntrinsicScalars()
8806 ScalarOp = DAG.getNode(ExtOpc, DL, XLenVT, ScalarOp); in lowerVectorIntrinsicScalars()
9041 unsigned ExtOpc = in promoteVCIXScalar()
9043 ScalarOp = DAG.getNode(ExtOpc, DL, XLenVT, ScalarOp); in promoteVCIXScalar()
12165 unsigned ExtOpc = ISD::ANY_EXTEND) { in customLegalizeToWOp()
12168 SDValue NewOp0 = DAG.getNode(ExtOpc, D in customLegalizeToWOp()
4322 unsigned ExtOpc = lowerScalarSplat() local
4389 unsigned ExtOpc = lowerScalarInsert() local
8802 unsigned ExtOpc = lowerVectorIntrinsicScalars() local
9039 unsigned ExtOpc = promoteVCIXScalar() local
12163 customLegalizeToWOp(SDNode * N,SelectionDAG & DAG,unsigned ExtOpc=ISD::ANY_EXTEND) customLegalizeToWOp() argument
12454 unsigned ExtOpc = ISD::ANY_EXTEND; ReplaceNodeResults() local
14330 unsigned ExtOpc = getExtOpc(*SupportsExt); getOrCreateExtendedOp() local
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h791 MachineInstrBuilder buildExtOrTrunc(unsigned ExtOpc, const DstOp &Res,
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp2648 unsigned ExtOpc = ISD::ANY_EXTEND) { in customLegalizeToWOp() argument
2657 NewOp0 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(0)); in customLegalizeToWOp()
2662 NewOp0 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(0)); in customLegalizeToWOp()
2663 SDValue NewOp1 = DAG.getNode(ExtOpc, DL, MVT::i64, N->getOperand(1)); in customLegalizeToWOp()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp1454 unsigned ExtOpc = in PromoteOperand() local
1456 return DAG.getNode(ExtOpc, DL, PVT, Op); in PromoteOperand()
7061 unsigned ExtOpc = N0.getOpcode(); in visitAND() local
7064 (ExtOpc != ISD::ZERO_EXTEND || !TLI.isZExtFree(N0Op0, VT)) && in visitAND()
7070 DAG.getNode(ExtOpc, DL, VT, N0Op0.getOperand(1))); in visitAND()
7072 DAG.getNode(ExtOpc, DL, VT, N0Op0.getOperand(0)), in visitAND()
12951 unsigned ExtOpc, in ExtendUsesToFormExtLoad() argument
12964 if (ExtOpc != ISD::ANY_EXTEND && User->getOpcode() == ISD::SETCC) { in ExtendUsesToFormExtLoad()
12966 if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC)) in ExtendUsesToFormExtLoad()
13288 ISD::NodeType ExtOpc, in tryToFoldExtOfLoad() argument
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H A DLegalizeIntegerTypes.cpp5869 unsigned ExtOpc = ISD::ANY_EXTEND; in PromoteIntRes_BUILD_VECTOR() local
5874 ExtOpc = NOutExtOpc; in PromoteIntRes_BUILD_VECTOR()
5875 Op = DAG.getNode(ExtOpc, dl, NOutVTElem, Op); in PromoteIntRes_BUILD_VECTOR()
H A DTargetLowering.cpp5571 ISD::NodeType ExtOpc = in LowerAsmOperandForConstraint() local
5574 ExtOpc == ISD::ZERO_EXTEND ? C->getZExtValue() : C->getSExtValue(); in LowerAsmOperandForConstraint()
9311 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in expandAVG() local
9335 LHS = DAG.getNode(ExtOpc, dl, ExtVT, LHS); in expandAVG()
9336 RHS = DAG.getNode(ExtOpc, dl, ExtVT, RHS); in expandAVG()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp20212 static SDValue SplitAndExtendv16i1(unsigned ExtOpc, MVT VT, SDValue In, in SplitAndExtendv16i1() argument
20219 Lo = DAG.getNode(ExtOpc, dl, MVT::v8i16, Lo); in SplitAndExtendv16i1()
20220 Hi = DAG.getNode(ExtOpc, dl, MVT::v8i16, Hi); in SplitAndExtendv16i1()
24469 unsigned ExtOpc = in LowerEXTEND_VECTOR_INREG() local
24472 return DAG.getNode(ExtOpc, dl, VT, In); in LowerEXTEND_VECTOR_INREG()
28443 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerABD() local
28444 SDValue LHS = DAG.getNode(ExtOpc, dl, WideVT, Op.getOperand(0)); in LowerABD()
28445 SDValue RHS = DAG.getNode(ExtOpc, dl, WideVT, Op.getOperand(1)); in LowerABD()
29691 unsigned ExtOpc = Opc == ISD::SRA ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerShift() local
29692 R = DAG.getNode(ExtOpc, dl, ExtVT, R); in LowerShift()
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H A DX86TargetTransformInfo.cpp3128 unsigned ExtOpc = in getCastInstrCost() local
3134 ExtCost = getCastInstrCost(ExtOpc, ExtSrc, Src, CCH, CostKind); in getCastInstrCost()