Searched refs:ExtB (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 64 MachineBasicBlock &ExtB = *ExtI->getParent(); in genElemLoad() local
78 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR) in genElemLoad()
86 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR) in genElemLoad()
89 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR) in genElemLoad()
163 MachineBasicBlock &ExtB = *ExtI->getParent(); in runOnMachineFunction() local
164 Register BaseR = EmitAddr(ExtB, ExtI, ExtI->getDebugLoc(), FI, in runOnMachineFunction()
170 ExtB.erase(ExtI); in runOnMachineFunction()
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| H A D | HexagonISelLoweringHVX.cpp | 1198 SDValue ExtB = extractHvxElementReg(ByteVec, IdxV, dl, MVT::i32, DAG); in extractHvxElementPred() local
1200 return getInstr(Hexagon::C2_cmpgtui, dl, MVT::i1, {ExtB, Zero}, DAG); in extractHvxElementPred()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2085 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO}); in widenScalarSrc() local
2086 MO.setReg(ExtB.getReg(0)); in widenScalarSrc()
2092 auto ExtB = MIRBuilder.buildTrunc(NarrowTy, MO); in narrowScalarSrc() local
2093 MO.setReg(ExtB.getReg(0)); in narrowScalarSrc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 17259 SDValue ExtB = Mul->getOperand(1); in PerformVECREDUCE_ADDCombine() local
17260 if (ExtA->getOpcode() != ExtendCode || ExtB->getOpcode() != ExtendCode) in PerformVECREDUCE_ADDCombine()
17263 B = ExtB->getOperand(0); in PerformVECREDUCE_ADDCombine()
17291 SDValue ExtB = Mul->getOperand(1); in PerformVECREDUCE_ADDCombine() local
17292 if (ExtA->getOpcode() != ExtendCode || ExtB->getOpcode() != ExtendCode) in PerformVECREDUCE_ADDCombine()
17295 B = ExtB->getOperand(0); in PerformVECREDUCE_ADDCombine()
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