| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 96 ExtractElementInst *getShuffleExtract(ExtractElementInst *Ext0,
99 bool isExtractExtractCheap(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
103 void foldExtExtCmp(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
105 void foldExtExtBinop(ExtractElementInst *Ext0, ExtractElementInst *Ext1,
351 ExtractElementInst *Ext0, ExtractElementInst *Ext1, in getShuffleExtract() argument
353 auto *Index0C = dyn_cast<ConstantInt>(Ext0->getIndexOperand()); in getShuffleExtract()
364 Type *VecTy = Ext0->getVectorOperand()->getType(); in getShuffleExtract()
368 TTI.getVectorInstrCost(*Ext0, VecTy, CostKind, Index0); in getShuffleExtract()
380 return Ext0; in getShuffleExtract()
389 return Ext0; in getShuffleExtract()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10331 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10339 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10343 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
10347 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
13375 SDValue Ext0 = Mul.getOperand(0); in PerformVQDMULHCombine() local
13377 if (Ext0.getOpcode() != ISD::SIGN_EXTEND || in PerformVQDMULHCombine()
13380 EVT VecVT = Ext0.getOperand(0).getValueType(); in PerformVQDMULHCombine()
13398 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
13415 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0), in PerformVQDMULHCombine()
17242 SDValue Ext0 = in PerformVECREDUCE_ADDCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 17841 SDValue Ext0 = Op0.getOperand(0); in performUADDVAddCombine() local
17843 if (Ext0.getOpcode() != ISD::EXTRACT_SUBVECTOR || in performUADDVAddCombine()
17845 Ext0.getOperand(0) != Ext1.getOperand(0)) in performUADDVAddCombine()
17849 if (Ext0.getOperand(0).getValueType().getVectorNumElements() != in performUADDVAddCombine()
17852 if ((Ext0.getConstantOperandVal(1) != 0 || in performUADDVAddCombine()
17855 Ext0.getConstantOperandVal(1) != VT.getVectorNumElements())) in performUADDVAddCombine()
17859 return DAG.getNode(Opcode, SDLoc(A), VT, Ext0.getOperand(0)); in performUADDVAddCombine()
17889 SDValue Ext0 = Op0.getOperand(0); in performUADDVZextCombine() local
17891 EVT ExtVT0 = Ext0.getValueType(); in performUADDVZextCombine()
17900 DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(A), PairVT, Ext0, Ext1); in performUADDVZextCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 3027 Instruction *Ext0, *Ext1; in foldICmpAddConstant() local
3030 m_Add(m_CombineAnd(m_Instruction(Ext0), m_ZExtOrSExt(m_Value(Op0))), in foldICmpAddConstant()
3040 Res += isa<ZExtInst>(Ext0) ? 1 : -1; in foldICmpAddConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3750 auto Ext0 = B.buildFPExt(F32, Log, Flags); in legalizeFPow() local
3753 .addUse(Ext0.getReg(0)) in legalizeFPow()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 42458 SDValue Ext0 = in SimplifyDemandedVectorEltsForTargetNode() local
42461 TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0, Op.getOperand(1)); in SimplifyDemandedVectorEltsForTargetNode()
44909 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
44913 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
44932 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in scalarizeExtEltFP() local
44939 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
57155 SDValue Ext0 = extractSubVector(InVec.getOperand(0), 0, DAG, DL, 128); in combineEXTRACT_SUBVECTOR() local
57158 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineEXTRACT_SUBVECTOR()
57172 SDValue Ext0 = in combineEXTRACT_SUBVECTOR() local
57177 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, InVec.getOperand(2)); in combineEXTRACT_SUBVECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13523 SDValue Ext0 = DAG.getNode(ExtOpcode, DL, VT, N00); in foldSextSetcc() local
13525 return DAG.getSetCC(DL, VT, Ext0, Ext1, CC); in foldSextSetcc()
22383 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op0, Index); in scalarizeExtractedBinop() local
22385 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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