Searched refs:EvenReg (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1769 Register EvenReg = MI->getOperand(0).getReg(); in FixInvalidRegPairOp() local
1771 unsigned EvenRegNum = TRI->getDwarfRegNum(EvenReg, false); in FixInvalidRegPairOp()
1776 bool Errata602117 = EvenReg == BaseReg && in FixInvalidRegPairOp()
1811 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1819 .addReg(EvenReg, in FixInvalidRegPairOp()
1838 if (isLd && TRI->regsOverlap(EvenReg, BaseReg)) { in FixInvalidRegPairOp()
1842 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp()
1846 if (OddReg == EvenReg && EvenDeadKill) { in FixInvalidRegPairOp()
1854 if (EvenReg == BaseReg) in FixInvalidRegPairOp()
1856 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 538 MCRegister EvenReg = TRI->getSubReg(SrcReg, RISCV::sub_gpr_even); in copyPhysReg() local
548 .addReg(EvenReg, KillFlag) in copyPhysReg()
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