Home
last modified time | relevance | path

Searched refs:EndReg (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h508 inline unsigned encodeRlist(MCRegister EndReg, bool IsRV32E = false) {
509 assert((!IsRV32E || EndReg <= RISCV::X9) && "Invalid Rlist for RV32E");
510 switch (EndReg) {
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h446 unsigned& BeginReg, unsigned& EndReg) const { in getInRegsParamInfo() argument
452 EndReg = info.End; in getInRegsParamInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp4666 int EndReg = tryParseRegister(AllowOutOfBoundReg); in parseRegisterList() local
4667 if (EndReg == -1) in parseRegisterList()
4669 if (EndReg == ARM::RA_AUTH_CODE) in parseRegisterList()
4672 if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg)) in parseRegisterList()
4673 EndReg = getDRegFromQReg(EndReg) + 1; in parseRegisterList()
4676 if (Reg == EndReg) in parseRegisterList()
4682 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList()
4686 while (Reg != EndReg) { in parseRegisterList()
4926 int EndReg = tryParseRegister(); in parseVectorList() local
4927 if (EndReg == -1) in parseVectorList()
[all …]