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Searched refs:EltVT (Results 1 – 25 of 41) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h102 EVT changeVectorElementType(EVT EltVT) const { in changeVectorElementType()
104 assert(EltVT.isSimple() && in changeVectorElementType()
106 return getSimpleVT().changeVectorElementType(EltVT.getSimpleVT()); in changeVectorElementType()
108 return changeExtendedVectorElementType(EltVT); in changeVectorElementType()
113 EVT changeElementType(EVT EltVT) const { in changeElementType()
114 EltVT = EltVT.getScalarType(); in changeElementType()
115 return isVector() ? changeVectorElementType(EltVT) : EltVT; in changeElementType()
440 EVT EltVT = getVectorElementType(); in widenIntegerVectorElementType() local
441 EltVT = EVT::getIntegerVT(Context, 2 * EltVT.getSizeInBits()); in widenIntegerVectorElementType()
442 return EVT::getVectorVT(Context, EltVT, getVectorElementCount()); in widenIntegerVectorElementType()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h208 MVT changeVectorElementType(MVT EltVT) const { in changeVectorElementType() argument
209 MVT VecTy = MVT::getVectorVT(EltVT, getVectorElementCount()); in changeVectorElementType()
227 MVT EltVT = getVectorElementType(); in getHalfNumVectorElementsVT() local
230 return getVectorVT(EltVT, EltCnt.divideCoefficientBy(2)); in getHalfNumVectorElementsVT()
236 MVT EltVT = getVectorElementType(); in getDoubleNumVectorElementsVT() local
238 return MVT::getVectorVT(EltVT, EltCnt * 2); in getDoubleNumVectorElementsVT()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLowLevelTypeUtils.cpp59 EVT EltVT = getApproximateEVTForLLT(Ty.getElementType(), Ctx); in getApproximateEVTForLLT() local
60 return EVT::getVectorVT(Ctx, EltVT, Ty.getElementCount()); in getApproximateEVTForLLT()
H A DTargetLoweringBase.cpp1066 EVT EltVT = VT.getVectorElementType(); in getTypeConversion() local
1070 return LegalizeKind(TypeScalarizeVector, EltVT); in getTypeConversion()
1075 if (EltVT.isInteger()) { in getTypeConversion()
1080 EVT NVT = EVT::getVectorVT(Context, EltVT, NumElts); in getTypeConversion()
1085 LegalizeKind LK = getTypeConversion(Context, EltVT); in getTypeConversion()
1091 return LegalizeKind(TypeScalarizeScalableVector, EltVT); in getTypeConversion()
1100 EVT OldEltVT = EltVT; in getTypeConversion()
1104 EltVT = EVT::getIntegerVT(Context, 1 + EltVT.getSizeInBits()) in getTypeConversion()
1111 if (!EltVT.isSimple()) in getTypeConversion()
1115 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion()
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H A DValueTypes.cpp33 EVT EVT::changeExtendedVectorElementType(EVT EltVT) const { in changeExtendedVectorElementType()
36 return getVectorVT(Context, EltVT, getVectorElementCount()); in changeExtendedVectorElementType()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp435 MVT EltVT = N->getSimpleValueType(0); in tryUNPACK_VECTOR() local
438 CurDAG->getMachineNode(NVPTX::I64toV2I32, SDLoc(N), EltVT, EltVT, Vector); in tryUNPACK_VECTOR()
486 MVT EltVT = VT.getVectorElementType(); in tryEXTRACT_VECTOR_ELEMENT() local
488 CurDAG->getMachineNode(Opcode, SDLoc(N), EltVT, EltVT, Vector); in tryEXTRACT_VECTOR_ELEMENT()
1104 const MVT EltVT = LD->getSimpleValueType(0); in tryLoadVector() local
1126 assert(!(EltVT.isVector() && ExtensionType != ISD::NON_EXTLOAD)); in tryLoadVector()
1147 pickOpcodeForVT(EltVT.SimpleTy, NVPTX::LDV_i8_v2, NVPTX::LDV_i16_v2, in tryLoadVector()
1152 pickOpcodeForVT(EltVT.SimpleTy, NVPTX::LDV_i8_v4, NVPTX::LDV_i16_v4, in tryLoadVector()
1156 Opcode = pickOpcodeForVT(EltVT.SimpleTy, {/* no v8i8 */}, {/* no v8i16 */}, in tryLoadVector()
1398 const MVT::SimpleValueType EltVT = in tryStoreVector() local
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H A DNVPTXISelLowering.cpp219 const MVT EltVT = VectorVT.getVectorElementType(); in getVectorLoweringShape() local
245 return std::pair(NumElts, EltVT); in getVectorLoweringShape()
284 const unsigned NPerReg = PackRegSize / EltVT.getSizeInBits(); in getVectorLoweringShape()
286 return std::pair(NumElts / NPerReg, MVT::getVectorVT(EltVT, NPerReg)); in getVectorLoweringShape()
341 EVT EltVT = VT.getVectorElementType(); in ComputePTXValueVTs() local
352 EltVT = MVT::v2i8; in ComputePTXValueVTs()
357 EltVT = MVT::v4i8; in ComputePTXValueVTs()
364 EltVT == PackedVT.getVectorElementType()) { in ComputePTXValueVTs()
365 EltVT = PackedVT; in ComputePTXValueVTs()
373 ValueVTs.push_back(EltVT); in ComputePTXValueVTs()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp409 EVT EltVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_BUILD_VECTOR() local
413 if (EltVT.isInteger()) in ScalarizeVecRes_BUILD_VECTOR()
414 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp); in ScalarizeVecRes_BUILD_VECTOR()
451 EVT EltVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_INSERT_VECTOR_ELT() local
452 if (Op.getValueType() != EltVT) in ScalarizeVecRes_INSERT_VECTOR_ELT()
454 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op); in ScalarizeVecRes_INSERT_VECTOR_ELT()
497 EVT EltVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_InregOp() local
500 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT, in ScalarizeVecRes_InregOp()
510 EVT EltVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_VecInregOp() local
520 return DAG.getNode(ISD::ANY_EXTEND, DL, EltVT, Op); in ScalarizeVecRes_VecInregOp()
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H A DLegalizeTypesGeneric.cpp314 EVT EltVT) { in IntegerToVector() argument
324 IntegerToVector(Parts[0], NumElements, Ops, EltVT); in IntegerToVector()
325 IntegerToVector(Parts[1], NumElements, Ops, EltVT); in IntegerToVector()
327 Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op)); in IntegerToVector()
H A DLegalizeVectorOps.cpp346 EVT EltVT = ValVT.getVectorElementType(); in LegalizeOp() local
347 if (TLI.getOperationAction(Node->getOpcode(), EltVT) in LegalizeOp()
349 TLI.getStrictFPOperationAction(Node->getOpcode(), EltVT) in LegalizeOp()
2281 EVT EltVT = VT.getVectorElementType(); in UnrollStrictFPOp() local
2286 EVT TmpEltVT = EltVT; in UnrollStrictFPOp()
2323 ScalarResult = DAG.getSelect(dl, EltVT, ScalarResult, in UnrollStrictFPOp()
2324 DAG.getAllOnesConstant(dl, EltVT), in UnrollStrictFPOp()
2325 DAG.getConstant(0, dl, EltVT)); in UnrollStrictFPOp()
2341 EVT EltVT = VT.getVectorElementType(); in UnrollVSETCC() local
2358 Ops[i] = DAG.getSelect(dl, EltVT, Ops[i], in UnrollVSETCC()
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H A DLegalizeDAG.cpp401 EVT EltVT = Vec.getValueType().getVectorElementType(); in ExpandINSERT_VECTOR_ELT() local
402 if (Val.getValueType() == EltVT || in ExpandINSERT_VECTOR_ELT()
403 (EltVT.isInteger() && Val.getValueType().bitsGE(EltVT))) { in ExpandINSERT_VECTOR_ELT()
2007 EVT EltVT = VT.getVectorElementType(); in ExpandBUILD_VECTOR() local
2048 if (OpVT==EltVT) in ExpandBUILD_VECTOR()
2055 CV.push_back(ConstantInt::get(EltVT.getTypeForEVT(*DAG.getContext()), in ExpandBUILD_VECTOR()
2060 Type *OpNTy = EltVT.getTypeForEVT(*DAG.getContext()); in ExpandBUILD_VECTOR()
3551 EVT EltVT = VT.getVectorElementType(); in ExpandNode() local
3554 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode()
3555 EVT NewEltVT = TLI.getTypeToTransformTo(*DAG.getContext(), EltVT); in ExpandNode()
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H A DSelectionDAG.cpp1175 EVT EltVT = N->getValueType(0).getVectorElementType(); in verifyNode() local
1177 assert((Op.getValueType() == EltVT || in verifyNode()
1178 (EltVT.isInteger() && Op.getValueType().isInteger() && in verifyNode()
1179 EltVT.bitsLE(Op.getValueType()))) && in verifyNode()
1676 EVT EltVT = VT.getScalarType(); in getConstant() local
1688 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) == in getConstant()
1690 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT); in getConstant()
1692 if (TLI->isSExtCheaperThanZExt(VT.getScalarType(), EltVT)) in getConstant()
1693 NewVal = Elt->getValue().sextOrTrunc(EltVT.getSizeInBits()); in getConstant()
1695 NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits()); in getConstant()
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H A DLegalizeIntegerTypes.cpp581 EVT EltVT = InOp.getValueType().getVectorElementType(); in PromoteIntRes_BITCAST() local
582 TypeSize EltSize = EltVT.getSizeInBits(); in PromoteIntRes_BITCAST()
588 EVT::getVectorVT(*DAG.getContext(), EltVT, NumEltsWithPadding); in PromoteIntRes_BITCAST()
2215 EVT EltVT = OutVT.getVectorElementType(); in PromoteIntOp_BITCAST() local
2216 TypeSize EltSize = EltVT.getSizeInBits(); in PromoteIntOp_BITCAST()
2222 EVT::getVectorVT(*DAG.getContext(), EltVT, NumEltsWithPadding); in PromoteIntOp_BITCAST()
2743 EVT EltVT = InVT.getVectorElementType(); in PromoteIntOp_VECREDUCE() local
2792 if (ResVT.bitsGE(EltVT)) in PromoteIntOp_VECREDUCE()
2797 SDValue Reduce = DAG.getNode(Opcode, dl, EltVT, Op); in PromoteIntOp_VECREDUCE()
2819 EVT EltVT = Op.getValueType().getScalarType(); in PromoteIntOp_VP_REDUCE() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA.td333 SDNode Move, ValueType VT, ValueType EltVT,
338 (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
346 (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
353 (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
360 (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
368 (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
H A DX86ISelLowering.h1045 bool mayFoldLoadIntoBroadcastFromMem(SDValue Op, MVT EltVT,
1546 EVT EltVT = VT.getScalarType(); local
1547 return (EltVT == MVT::f32 || EltVT == MVT::f64) && Index == 0;
H A DX86InstrUtils.td210 // EltVT). These are things like the register class for the writemask, etc.
217 ValueType EltVT = eltvt;
237 // v # NumElts # EltVT, so for vector of 8 elements of i32 it will be v8i32
241 !if (!eq (EltVT.Size, 16), 8,
242 !if (!eq (EltVT.Size, 32), 4,
243 !if (!eq (EltVT.Size, 64), 2, NumElts))), NumElts) # EltVT;
248 string EltTypeName = !cast<string>(EltVT);
251 int EltSize = EltVT.Size;
H A DX86ISelLowering.cpp2795 bool X86::mayFoldLoadIntoBroadcastFromMem(SDValue Op, MVT EltVT, in mayFoldLoadIntoBroadcastFromMem() argument
2806 Ld->getValueSizeInBits(0) == EltVT.getScalarSizeInBits(); in mayFoldLoadIntoBroadcastFromMem()
3996 MVT EltVT = ConstVecVT.getVectorElementType(); in getConstVector() local
3999 SDValue OpNode = IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector()
4000 DAG.getConstant(Values[i], dl, EltVT); in getConstVector()
4003 Ops.push_back(IsUndef ? DAG.getUNDEF(EltVT) : in getConstVector()
4004 DAG.getConstant(0, dl, EltVT)); in getConstVector()
4027 MVT EltVT = ConstVecVT.getVectorElementType(); in getConstVector() local
4028 MVT EltIntVT = EltVT.changeTypeToInteger(); in getConstVector()
4031 Ops.append(Split ? 2 : 1, DAG.getUNDEF(EltVT)); in getConstVector()
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H A DX86InstrAVX512.td3983 (_.EltVT (X86selects VK1WM:$mask,
3984 (_.EltVT _.FRC:$src1),
3985 (_.EltVT _.FRC:$src2))))))),
3994 (_.EltVT (X86selects VK1WM:$mask,
3995 (_.EltVT _.FRC:$src1),
3996 (_.EltVT ZeroFP))))))),
6895 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src1,
6897 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src1,
6899 (set _.FRC:$dst, (_.EltVT (OpNodeRnd _.FRC:$src2, _.FRC:$src1,
6903 (set _.FRC:$dst, (_.EltVT (OpNode _.FRC:$src2, _.FRC:$src3,
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1167 MVT EltVT = VT.getVectorElementType(); in RISCVTargetLowering() local
1168 if (isTypeLegal(EltVT)) in RISCVTargetLowering()
1174 EltVT, Custom); in RISCVTargetLowering()
2353 EVT EltVT = ResVT.getVectorElementType(); in isExtractSubvectorCheap() local
2354 assert(EltVT == SrcVT.getVectorElementType() && "Should hold for node"); in isExtractSubvectorCheap()
2358 if (EltVT == MVT::i1) in isExtractSubvectorCheap()
2365 unsigned MinVLMAX = MinVLen / EltVT.getSizeInBits(); in isExtractSubvectorCheap()
2762 MVT EltVT = VT.getVectorElementType(); in useRVVForFixedLengthVectorVT() local
2765 switch (EltVT.SimpleTy) { in useRVVForFixedLengthVectorVT()
2802 if (EltVT.getSizeInBits() > Subtarget.getELen()) in useRVVForFixedLengthVectorVT()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp440 EVT EltVT = VT.getVectorElementType(); in SelectBuildVector() local
445 CurDAG->SelectNodeTo(N, AMDGPU::COPY_TO_REGCLASS, EltVT, N->getOperand(0), in SelectBuildVector()
455 unsigned EltSize = EltVT.getSizeInBits(); in SelectBuildVector()
504 DL, EltVT); in SelectBuildVector()
521 EVT EltVT = VT.getVectorElementType(); in SelectVectorShuffle() local
524 if (!Subtarget->hasPkMovB32() || !EltVT.bitsEq(MVT::i32) || in SelectVectorShuffle()
597 CurDAG->getTargetExtractSubreg(Src0SubReg, DL, EltVT, VSrc0); in SelectVectorShuffle()
599 CurDAG->getTargetExtractSubreg(Src1SubReg, DL, EltVT, VSrc1); in SelectVectorShuffle()
H A DSIISelLowering.cpp6558 EVT EltVT = VT.getVectorElementType(); in lowerLaneOp() local
6588 Scalars.push_back(DAG.getNode(N->getOpcode(), SL, EltVT, Operands)); in lowerLaneOp()
6591 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NE); in lowerLaneOp()
7695 EVT EltVT = VecVT.getVectorElementType(); in lowerINSERT_SUBVECTOR() local
7700 if (EltVT.getScalarSizeInBits() == 16 && IdxVal % 2 == 0) { in lowerINSERT_SUBVECTOR()
7730 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, Ins, in lowerINSERT_SUBVECTOR()
7744 EVT EltVT = VecVT.getVectorElementType(); in lowerINSERT_VECTOR_ELT() local
7746 unsigned EltSize = EltVT.getSizeInBits(); in lowerINSERT_VECTOR_ELT()
7827 EVT EltVT = VecVT.getVectorElementType(); in lowerEXTRACT_VECTOR_ELT() local
7886 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, Half, NewIdx); in lowerEXTRACT_VECTOR_ELT()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp1128 MVT EltVT = VT.getVectorElementType(); in getPreferredVectorAction() local
1132 if (EltVT == MVT::i8 || EltVT == MVT::i16 || EltVT == MVT::i32 || in getPreferredVectorAction()
1133 EltVT == MVT::i64 || EltVT == MVT::f32 || EltVT == MVT::f64) in getPreferredVectorAction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp283 EVT EltVT = N->getValueType(0).getVectorElementType(); in SelectSVEShiftSplatImmR() local
285 /* High */ EltVT.getFixedSizeInBits(), in SelectSVEShiftSplatImmR()
1830 EVT EltVT = VT.getVectorElementType(); in SelectOpcodeFromVT() local
1836 if (EltVT != MVT::i8 && EltVT != MVT::i16 && EltVT != MVT::i32 && in SelectOpcodeFromVT()
1837 EltVT != MVT::i64) in SelectOpcodeFromVT()
1841 if (EltVT != MVT::i1) in SelectOpcodeFromVT()
1845 if (EltVT == MVT::bf16) in SelectOpcodeFromVT()
1847 else if (EltVT != MVT::bf16 && EltVT != MVT::f16 && EltVT != MVT::f32 && in SelectOpcodeFromVT()
1848 EltVT != MVT::f64) in SelectOpcodeFromVT()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp4346 EVT EltVT = VT.getVectorElementType(); in ReplaceNodeResults() local
4352 if ((InEltVT.getSizeInBits() % EltVT.getSizeInBits()) == 0) { in ReplaceNodeResults()
4353 int Scale = InEltVT.getSizeInBits() / EltVT.getSizeInBits(); in ReplaceNodeResults()
4584 EVT EltVT = CmpVT.getVectorElementType(); in performSETCC_BITCASTCombine() local
4600 if (ISD::isBuildVectorAllZeros(SrcN1.getNode()) && EltVT == MVT::i8) in performSETCC_BITCASTCombine()
4605 if (ISD::isBuildVectorAllOnes(SrcN1.getNode()) && EltVT == MVT::i8) in performSETCC_BITCASTCombine()
4610 if (ISD::isBuildVectorAllZeros(SrcN1.getNode()) && EltVT == MVT::i8) in performSETCC_BITCASTCombine()
4616 (EltVT == MVT::i8 || EltVT == MVT::i16 || EltVT == MVT::i32 || in performSETCC_BITCASTCombine()
4617 EltVT == MVT::i64)) in performSETCC_BITCASTCombine()
4623 (EltVT == MVT::i8 || EltVT == MVT::i16 || EltVT == MVT::i32 || in performSETCC_BITCASTCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8206 EVT EltVT = EVT::getFloatingPointVT(EltSize); in LowerBUILD_VECTOR() local
8207 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerBUILD_VECTOR()
8210 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
8325 EVT EltVT = SrcVT.getVectorElementType(); in ReconstructShuffle() local
8326 unsigned NumSrcElts = VTSize / EltVT.getFixedSizeInBits(); in ReconstructShuffle()
8327 EVT DestVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumSrcElts); in ReconstructShuffle()
9060 EVT EltVT = EVT::getFloatingPointVT(EltSize); in LowerVECTOR_SHUFFLE() local
9061 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerVECTOR_SHUFFLE()
9067 Ops.push_back(DAG.getUNDEF(EltVT)); in LowerVECTOR_SHUFFLE()
9069 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
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