Searched refs:EltIdx (Results 1 – 8 of 8) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64PromoteConstant.cpp | 244 for (unsigned EltIdx = 0, EndEltIdx = CstTy->getStructNumElements(); in isConstantUsingVectorTy() local 245 EltIdx < EndEltIdx; ++EltIdx) in isConstantUsingVectorTy() 246 if (isConstantUsingVectorTy(CstTy->getStructElementType(EltIdx))) in isConstantUsingVectorTy()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 2728 for (unsigned EltIdx = 0; EltIdx != NumElts; ++EltIdx) { in computeVectorKnownZeroElements() local 2729 if (!DemandedElts[EltIdx]) in computeVectorKnownZeroElements() 2731 APInt Mask = APInt::getOneBitSet(NumElts, EltIdx); in computeVectorKnownZeroElements() 2733 KnownZeroElements.setBit(EltIdx); in computeVectorKnownZeroElements() 4034 unsigned EltIdx = CEltNo->getZExtValue(); in computeKnownBits() local 4035 DemandedVal = !!DemandedElts[EltIdx]; in computeKnownBits() 4036 DemandedVecElts.clearBit(EltIdx); in computeKnownBits() 4877 unsigned EltIdx = CEltNo->getZExtValue(); in ComputeNumSignBits() local 4878 DemandedVal = !!DemandedElts[EltIdx]; in ComputeNumSignBits() 4879 DemandedVecElts.clearBit(EltIdx); in ComputeNumSignBits()
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H A D | DAGCombiner.cpp | 26956 int EltIdx = i / Split; in XformToShuffleWithZero() local 26958 SDValue Elt = RHS.getOperand(EltIdx); in XformToShuffleWithZero()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 972 [&](Instruction *Elt, unsigned EltIdx, std::optional<BasicBlock *> UseBB, in foldAggregateConstructionIntoAggregateReuse() 990 if (EVI->getNumIndices() != 1 || EltIdx != EVI->getIndices().front()) in foldAggregateConstructionIntoAggregateReuse()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 6695 unsigned EltMaskIdx, EltIdx; in LowerBuildVectorv4x32() local 6697 for (EltIdx = 0; EltIdx < 4; ++EltIdx) { in LowerBuildVectorv4x32() 6698 if (Zeroable[EltIdx]) { in LowerBuildVectorv4x32() 6700 Mask[EltIdx] = EltIdx+4; in LowerBuildVectorv4x32() 6704 Elt = Op->getOperand(EltIdx); in LowerBuildVectorv4x32() 6707 if (Elt.getOperand(0) != V1 || EltMaskIdx != EltIdx) in LowerBuildVectorv4x32() 6709 Mask[EltIdx] = EltIdx; in LowerBuildVectorv4x32() 6712 if (EltIdx == 4) { in LowerBuildVectorv4x32() 6727 if (Elt == FirstNonZero && EltIdx == FirstNonZeroIdx) in LowerBuildVectorv4x32() 6731 for (unsigned i = EltIdx + 1; i < 4 && CanFold; ++i) { in LowerBuildVectorv4x32() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 6251 for (unsigned i = 0, EltIdx = 0; i < ValSize / 32; i++) { in lowerLaneOp() local 6253 DAG.getConstant(EltIdx, SL, MVT::i32)); in lowerLaneOp() 6257 DAG.getConstant(EltIdx, SL, MVT::i32)); in lowerLaneOp() 6261 DAG.getConstant(EltIdx, SL, MVT::i32)); in lowerLaneOp() 6267 EltIdx += 2; in lowerLaneOp() 7409 int EltIdx = Idx < SrcNumElts ? Idx : Idx - SrcNumElts; in lowerVECTOR_SHUFFLE() local 7412 DAG.getConstant(EltIdx, SL, MVT::i32)); in lowerVECTOR_SHUFFLE() 13461 unsigned EltIdx = BitIndex / 32; in performExtractVectorEltCombine() local 13469 DAG.getConstant(EltIdx, SL, MVT::i32)); in performExtractVectorEltCombine()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 332 for (unsigned EltIdx = 0, EltEnd = OpType.getNumElements(); in matchCombineConcatVectors() local 333 EltIdx != EltEnd; ++EltIdx) in matchCombineConcatVectors()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 3852 unsigned EltIdx = 0; in lowerBuildVectorOfConstants() 3860 ((SeqV->getAsZExtVal() & EltMask) << (EltIdx * EltBitSize)); in lowerBuildVectorOfConstants() 3861 EltIdx++; in lowerBuildVectorOfConstants() 3851 unsigned EltIdx = 0; lowerBuildVectorOfConstants() local
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