Searched refs:ElemsPerVReg (Results 1 – 1 of 1) sorted by relevance
4075 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); in lowerBUILD_VECTOR() 4077 MVT OneRegVT = MVT::getVectorVT(ElemVT, ElemsPerVReg); in lowerBUILD_VECTOR() 4088 for (unsigned i = 0; i < VT.getVectorNumElements(); i += ElemsPerVReg) { in lowerBUILD_VECTOR() 4089 auto OneVRegOfOps = ArrayRef(BuildVectorOps).slice(i, ElemsPerVReg); in lowerBUILD_VECTOR() 4093 unsigned InsertIdx = (i / ElemsPerVReg) * NumOpElts; in lowerBUILD_VECTOR() 5020 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); in lowerShuffleViaVRegSplitting() 5021 unsigned VRegsPerSrc = NumElts / ElemsPerVReg; in lowerShuffleViaVRegSplitting() 5030 int DstVecIdx = DstIdx / ElemsPerVReg; in lowerShuffleViaVRegSplitting() 5031 int DstSubIdx = DstIdx % ElemsPerVReg; in lowerShuffleViaVRegSplitting() 5035 int SrcVecIdx = SrcIdx / ElemsPerVReg; in lowerShuffleViaVRegSplitting() 4074 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); lowerBUILD_VECTOR() local 5019 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); lowerShuffleViaVRegSplitting() local 8489 unsigned ElemsPerVReg = *VLEN / ElemVT.getFixedSizeInBits(); lowerINSERT_VECTOR_ELT() local 8700 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); lowerEXTRACT_VECTOR_ELT() local [all...]