| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.h | 125 MVT getLegalVectorType(Packing P, MVT ElemVT);
216 EVT getVectorVT(EVT ElemVT, unsigned NumElems) const { in getVectorVT() argument
217 return EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in getVectorVT()
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| H A D | VECustomDAG.cpp | 34 MVT getLegalVectorType(Packing P, MVT ElemVT) { in getLegalVectorType() argument
35 return MVT::getVectorVT(ElemVT, P == Packing::Normal ? StandardVectorWidth in getLegalVectorType()
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| H A D | VEISelLowering.cpp | 341 MVT ElemVT = VT.getVectorElementType(); in initVPUActions() local
342 unsigned ElemBits = ElemVT.getScalarSizeInBits(); in initVPUActions()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 106 EVT ElemVT = NOutVT; in ExpandRes_BITCAST() local
107 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST()
109 // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>. in ExpandRes_BITCAST()
111 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; in ExpandRes_BITCAST()
116 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); in ExpandRes_BITCAST()
117 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST()
125 Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, in ExpandRes_BITCAST()
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| H A D | LegalizeVectorTypes.cpp | 7176 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE()
7181 SDValue NeutralElem = DAG.getNeutralElement(BaseOpc, dl, ElemVT, Flags); in WidenVecOp_VECREDUCE()
7190 EVT SplatVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, in WidenVecOp_VECREDUCE()
7214 EVT ElemVT = OrigVT.getVectorElementType(); in WidenVecOp_VECREDUCE_SEQ()
7219 SDValue NeutralElem = DAG.getNeutralElement(BaseOpc, dl, ElemVT, Flags); in WidenVecOp_VECREDUCE_SEQ()
7227 EVT SplatVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, in WidenVecOp_VECREDUCE_SEQ()
7172 EVT ElemVT = OrigVT.getVectorElementType(); WidenVecOp_VECREDUCE() local
7210 EVT ElemVT = OrigVT.getVectorElementType(); WidenVecOp_VECREDUCE_SEQ() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 729 SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 3946 MVT ElemVT = VT.getVectorElementType(); in lowerBuildVectorViaPacking()
3947 if (!ElemVT.isInteger()) in lowerBuildVectorViaPacking()
3956 unsigned ElemSizeInBits = ElemVT.getSizeInBits(); in lowerBuildVectorViaPacking()
4074 MVT ElemVT = VT.getVectorElementType(); in lowerBUILD_VECTOR()
4075 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); in lowerBUILD_VECTOR()
4077 MVT OneRegVT = MVT::getVectorVT(ElemVT, ElemsPerVReg); in lowerBUILD_VECTOR()
5019 MVT ElemVT = VT.getVectorElementType(); in lowerShuffleViaVRegSplitting()
5020 unsigned ElemsPerVReg = *VLen / ElemVT.getFixedSizeInBits(); in lowerShuffleViaVRegSplitting()
5050 MVT OneRegVT = MVT::getVectorVT(ElemVT, ElemsPerVReg); in lowerShuffleViaVRegSplitting()
8490 EVT ElemVT in lowerINSERT_VECTOR_ELT()
3945 MVT ElemVT = VT.getVectorElementType(); lowerBuildVectorViaPacking() local
4073 MVT ElemVT = VT.getVectorElementType(); lowerBUILD_VECTOR() local
5018 MVT ElemVT = VT.getVectorElementType(); lowerShuffleViaVRegSplitting() local
8488 EVT ElemVT = VecVT.getVectorElementType(); lowerINSERT_VECTOR_ELT() local
8699 EVT ElemVT = VecVT.getVectorElementType(); lowerEXTRACT_VECTOR_ELT() local
13378 EVT ElemVT = VT.getVectorElementType().getHalfSizedIntegerVT(C); combineBinOpOfZExt() local
21416 EVT ElemVT = VT.getVectorElementType(); allowsMisalignedMemoryAccesses() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15190 EVT ElemVT = VecVT.getVectorElementType(); in getVectorBitwiseReduce() local
15196 if (ElemVT == MVT::i1) { in getVectorBitwiseReduce()
15256 DAG.getConstant(Shift * ElemVT.getSizeInBits(), DL, MVT::i64); in getVectorBitwiseReduce()
15262 Result = DAG.getAnyExtOrTrunc(Scalar, DL, ElemVT); in getVectorBitwiseReduce()
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