1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2024 Ruslan Bukin <br@bsdpad.com>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/bus.h>
31 #include <sys/kernel.h>
32 #include <sys/lock.h>
33 #include <sys/module.h>
34 #include <sys/mutex.h>
35
36 #include <machine/bus.h>
37 #include <machine/cpu.h>
38
39 #include <dev/syscon/syscon.h>
40 #include <dev/hwreset/hwreset.h>
41
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
44 #include <dev/ofw/openfirm.h>
45
46 #include "syscon_if.h"
47 #include "hwreset_if.h"
48
49 struct eswin_rst_softc {
50 device_t dev;
51 struct mtx mtx;
52 struct syscon *syscon;
53 };
54
55 #define RESET_BLOCK 0x400
56 #define RESET_ID_TO_REG(x) (RESET_BLOCK + (x) * 4)
57
58 #define ERST_LOCK(sc) mtx_lock(&(sc)->mtx)
59 #define ERST_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
60 #define ERST_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED);
61 #define ERST_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED);
62
63 #define ERST_READ(_sc, _reg) \
64 SYSCON_READ_4(sc->syscon, (_reg))
65 #define ERST_WRITE(_sc, _reg, _val) \
66 SYSCON_WRITE_4(sc->syscon, (_reg), (_val))
67
68 static struct ofw_compat_data compat_data[] = {
69 { "eswin,eic7700-reset", 1 },
70 { NULL, 0 },
71 };
72
73 static int
eswin_rst_probe(device_t dev)74 eswin_rst_probe(device_t dev)
75 {
76
77 if (!ofw_bus_status_okay(dev))
78 return (ENXIO);
79
80 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
81 return (ENXIO);
82
83 device_set_desc(dev, "Eswin Reset");
84
85 return (BUS_PROBE_DEFAULT);
86 }
87
88 static int
eswin_rst_attach(device_t dev)89 eswin_rst_attach(device_t dev)
90 {
91 struct eswin_rst_softc *sc;
92 int error;
93
94 sc = device_get_softc(dev);
95 sc->dev = dev;
96
97 error = syscon_get_by_ofw_node(dev, OF_parent(ofw_bus_get_node(dev)),
98 &sc->syscon);
99 if (error != 0) {
100 device_printf(dev, "Couldn't get syscon handle of parent\n");
101 return (error);
102 }
103
104 mtx_init(&sc->mtx, device_get_nameunit(sc->dev), NULL, MTX_DEF);
105
106 hwreset_register_ofw_provider(dev);
107
108 return (0);
109 }
110
111 static int
eswin_rst_reset_assert(device_t dev,intptr_t id,bool reset)112 eswin_rst_reset_assert(device_t dev, intptr_t id, bool reset)
113 {
114 struct eswin_rst_softc *sc;
115 uint32_t reg;
116 uint32_t base;
117 uint32_t bit;
118
119 sc = device_get_softc(dev);
120
121 base = RESET_ID_TO_REG(id >> 5);
122 bit = id & 0x1f;
123
124 ERST_LOCK(sc);
125 reg = ERST_READ(sc, base);
126 if (reset)
127 reg &= ~(1 << bit);
128 else
129 reg |= (1 << bit);
130 ERST_WRITE(sc, base, reg);
131 ERST_UNLOCK(sc);
132
133 return (0);
134 }
135
136 static int
eswin_rst_reset_is_asserted(device_t dev,intptr_t id,bool * reset)137 eswin_rst_reset_is_asserted(device_t dev, intptr_t id, bool *reset)
138 {
139 struct eswin_rst_softc *sc;
140 uint32_t reg;
141 uint32_t base;
142 uint32_t bit;
143
144 sc = device_get_softc(dev);
145
146 base = RESET_ID_TO_REG(id >> 5);
147 bit = id & 0x1f;
148
149 ERST_LOCK(sc);
150 reg = ERST_READ(sc, base);
151 *reset = (reg & (1 << bit)) == 0;
152 ERST_UNLOCK(sc);
153
154 return (0);
155 }
156
157 static int
eswin_rst_map(device_t provider_dev,phandle_t xref,int ncells,pcell_t * cells,intptr_t * id)158 eswin_rst_map(device_t provider_dev, phandle_t xref, int ncells,
159 pcell_t *cells, intptr_t *id)
160 {
161
162 KASSERT(ncells == 2, ("wrong ncells"));
163
164 *id = cells[0] << 5;
165 *id |= ilog2(cells[1]);
166
167 return (0);
168 }
169
170 static device_method_t eswin_rst_methods[] = {
171 /* Device interface. */
172 DEVMETHOD(device_probe, eswin_rst_probe),
173 DEVMETHOD(device_attach, eswin_rst_attach),
174
175 /* Reset interface. */
176 DEVMETHOD(hwreset_assert, eswin_rst_reset_assert),
177 DEVMETHOD(hwreset_is_asserted, eswin_rst_reset_is_asserted),
178 DEVMETHOD(hwreset_map, eswin_rst_map),
179
180 DEVMETHOD_END
181 };
182
183 static driver_t eswin_rst_driver = {
184 "eswin_rst",
185 eswin_rst_methods,
186 sizeof(struct eswin_rst_softc)
187 };
188
189 EARLY_DRIVER_MODULE(eswin_rst, simplebus, eswin_rst_driver, 0, 0,
190 BUS_PASS_BUS + BUS_PASS_ORDER_LATE);
191