/freebsd/contrib/tcsh/ |
H A D | termcap.vms | 28 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:ta=^I:pt:sr=5\EM:vt#3:xn:\ 48 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:ta=^I:pt:sr=5\EM:vt#3:xn:\
|
/freebsd/crypto/heimdal/appl/telnet/arpa/ |
H A D | telnet.h | 58 #define EOR 239 /* end of record (transparent mode) */ macro
|
/freebsd/contrib/telnet/arpa/ |
H A D | telnet.h | 55 #define EOR 239 /* end of record (transparent mode) */ macro
|
/freebsd/include/arpa/ |
H A D | telnet.h | 54 #define EOR 239 /* end of record (transparent mode) */ macro
|
/freebsd/contrib/netbsd-tests/lib/libcurses/ |
H A D | atf.terminfo | 23 kf29=\E[15;5~, kf3=\EOR, kf30=\E[17;5~, kf31=\E[18;5~,
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedA510.td | 435 def : InstRW<[CortexA510Write<3, CortexA510UnitVALU>], (instregex "(AND|EOR|NOT|ORN)v8i8", 437 def : InstRW<[CortexA510Write<3, CortexA510UnitVALU>], (instregex "(AND|EOR|NOT|ORN)v16i8", 598 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP")>; 862 (instregex "^(AND|EOR|ORR)_ZI", 863 "^(AND|BIC|EOR|EOR|ORR)_ZZZ", 864 "^(AND|BIC|EOR|NOT|ORR)_ZPmZ_[BHSD]", 865 "^(AND|BIC|EOR|NOT|ORR)_ZPZZ_[BHSD]")>; 868 (instregex "^EOR(BT|TB)_ZZZ_[BHSD]")>;
|
H A D | AArch64SchedTSV110.td | 370 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "(ADD|AND|EOR|ORR|SUB)[WX]r(r|i)")>; 371 def : InstRW<[TSV110Wr_1cyc_1AB], (instregex "(ADD|AND|EOR|ORR|SUB)S[WX]r(r|i)")>; 383 def : InstRW<[TSV110WrISReg], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]rs$")>; 388 def : InstRW<[TSV110WrISRegBr], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)S[WX]rs$")>; 578 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(AND|BIC|BIF|BIT|BSL|EOR|MVN|NOT|ORN|ORR)v")…
|
H A D | AArch64SchedNeoverseV1.td | 540 def : InstRW<[V1Write_1c_1I], (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>; 1339 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP$")>; 1343 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)S_PPzPP$")>; 1383 "^(AND|EOR|ORR)_ZI$", 1384 "^(AND|BIC|EOR|EOR(BT|TB)?|ORR)_ZP?ZZ", 1385 "^EOR(BT|TB)_ZZZ_[BHSD]$", 1386 "^(AND|BIC|EOR|NOT|ORR)_ZPmZ_[BHSD]")>; 1531 def : InstRW<[V1Write_12c_4V01], (instregex "^(AND|EOR|OR)V_VPZ_[BHSD]$")>;
|
H A D | AArch64SchedExynosM5.td | 635 def : InstRW<[M5WriteAXW], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Wrs$")>; 636 def : InstRW<[M5WriteAXX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)Xrs$")>; 693 def : InstRW<[M5WriteLGW], (instregex "^LD(ADD|CLR|EOR|SET|[SU]MAX|[SU]MIN)(A|AL|L)?[BHW]$")>; 694 def : InstRW<[M5WriteLGX], (instregex "^LD(ADD|CLR|EOR|SET|[SU]MAX|[SU]MIN)(A|AL|L)?X$")>; 791 def : InstRW<[M5WriteNALU2], (instregex "^(AND|BIC|EOR|NOT|ORN|ORR)v")>;
|
H A D | AArch64SchedA64FX.td | 1362 // ASIMD logical (AND, BIC, EOR) 1497 (instregex "((AND|ORN|EOR|EON)S?(Xr[rsi]|v16i8|v8i16|v4i32)|" # 2138 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_B")>; 2146 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_H")>; 2154 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_S")>; 2162 (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_D")>;
|
H A D | AArch64SchedNeoverseN2.td | 658 (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>; 1543 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP$")>; 1781 (instregex "^(AND|EOR|ORR)_ZI", 1782 "^(AND|BIC|EOR|ORR)_ZZZ", 1783 "^EOR(BT|TB)_ZZZ_[BHSD]", 1784 "^(AND|BIC|EOR|NOT|ORR)_(ZPmZ|ZPZZ)_[BHSD]",
|
H A D | AArch64SchedA55.td | 423 def : InstRW<[CortexA55WriteAluVd_1], (instregex "(AND|EOR|NOT|ORN)v8i8", 425 def : InstRW<[CortexA55WriteAluVq_1], (instregex "(AND|EOR|NOT|ORN)v16i8",
|
H A D | AArch64SchedNeoverseV2.td | 1145 def : InstRW<[V2Write_1cyc_1I], (instregex "^(AND|BIC|EON|EOR|ORN)[WX]rs$")>; 2052 (instregex "^(AND|BIC|EOR|NAND|NOR|ORN|ORR)_PPzPP")>; 2292 (instregex "^(AND|EOR|ORR)_ZI", 2293 "^(AND|BIC|EOR|ORR)_ZZZ", 2294 "^EOR(BT|TB)_ZZZ_[BHSD]", 2295 "^(AND|BIC|EOR|NOT|ORR)_(ZPmZ|ZPZZ)_[BHSD]", 2405 def : InstRW<[V2Write_6cyc_1V_1V13], (instregex "^(AND|EOR|OR)V_VPZ_[BHSD]")>;
|
H A D | AArch64SchedFalkorDetails.td | 660 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(AND|ORR|ORN|BIC|EOR)v8i8$")>; 724 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^(AND|ORR|ORN|BIC|EOR)v16i8$")>; 898 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^EOR(W|X)r(i|r|s)$")>;
|
H A D | AArch64SchedExynosM3.td | 501 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>; 621 def : InstRW<[M3WriteNALU1], (instregex "^(AND|BIC|EOR|MVNI|NOT|ORN|ORR)v")>;
|
H A D | AArch64SchedAmpere1.td | 939 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)(W|X)r[sx]")>; 941 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)(W|X)r[ri]")>;
|
H A D | AArch64SchedAmpere1B.td | 921 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]r[sx]")>; 923 (instregex "(ADD|AND|BIC|EON|EOR|ORN|ORR|SUB)[WX]r[ri]")>;
|
H A D | AArch64SchedExynosM4.td | 597 def : InstRW<[M4WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>; 743 def : InstRW<[M4WriteNALU1], (instregex "^(AND|BIC|EOR|NOT|ORN|ORR)v")>;
|
H A D | AArch64SchedOryon.td | 751 (instregex "^AND(W|X)r(i|r|x)", "^EOR(W|X)r(i|r|x)", 757 (instregex "^AND(W|X)rs", "^EOR(W|X)rs", "^ORR(W|X)rs",
|
/freebsd/contrib/tcpdump/ |
H A D | print-telnet.c | 81 #define EOR 239 /* end of record (transparent mode) */ macro
|
/freebsd/crypto/heimdal/appl/telnet/telnetd/ |
H A D | state.c | 245 case EOR: in telrcv()
|
/freebsd/share/termcap/ |
H A D | termcap | 288 :k2=\EOQ:k3=\EOR:k4=\EOS:k5=\EOT:k6=\EOU:k7=\EOV:\ 552 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:pt:sr=5\EM:vt#3:xn:\ 581 :k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:\ 743 :kh=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:pt:sr=5\EM:xn:\ 904 :k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:\ 1018 :kh=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:pt: 1048 :k1=\E[001q:k;=\EOQ:F1=\EOR:F2=\EOS:\ 1763 :kh=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS: 2476 :k0=\EOy:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:k5=\EOt:\ 2506 :ho=\E[H:k1=\EOP:k2=\EOQ:k3=\EOR:k4=\EOS:ta=^I:pt:sr=5\EM:vt#3:xn:\ [all …]
|
/freebsd/contrib/ncurses/misc/ |
H A D | terminfo.src | 565 kf1=\EOP, kf2=\EOR, kf4=\EOS, nel=\r\ED, ri=\EM, rmir=\E[4l, 842 kf18=\Ew, kf19=\Ex, kf2=\EOQ, kf20=\Ey, kf3=\EOR, kf4=\EOS, 1263 kf1=\EOP, kf10=\EOY, kf2=\EOQ, kf3=\EOR, kf4=\EOS, kf5=\EOT, 1335 kf19=\E[33~, kf2=\EOQ, kf20=\E[34~, kf3=\EOR, kf4=\EOS, 1469 kf27=\E[3~, kf28=\E[4~, kf29=\E[5~, kf3=\EOR, kf30=\E[6~, 1813 kf2=\EOQ, kf20=\E[34~, kf3=\EOR, kf4=\EOS, kf5=\E[17~, 2184 kf3=\EOR, kf4=\EOS, kf5=\E[15~, kf6=\E[17~, kf7=\E[18~, 2204 kf2=\EOQ, kf3=\EOR, kf4=\EOS, kf5=\E[15~, kf6=\E[17~, 2442 kent=\EOM, kf1=\EOP, kf2=\EOQ, kf3=\EOR, kf4=\EOS, 2619 kf3=\EOR, kf4=\EOS, nel=\r\n, rev=\E[7m$<2/>, ri=\EM$<5/>, [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleM7.td | 326 (instregex "t2(ADC|ADDS|ADD|BIC|EOR|ORN|ORR|RSBS|RSB|SBC|SUBS)rs$",
|
/freebsd/crypto/heimdal/appl/telnet/telnet/ |
H A D | commands.c | 220 { "eor", "Send Telnet 'End of Record'", 1, 0, 0, 2, EOR },
|