/freebsd/sys/cddl/dev/dtrace/x86/ |
H A D | regset.h | 98 #define EIP 13 macro 113 #define REG_PC EIP
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/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/ |
H A D | SimpleRemoteEPC.cpp | 297 std::promise<MSVCPExpected<SimpleRemoteEPCExecutorInfo>> EIP; in setup() local 298 auto EIF = EIP.get_future(); in setup() 305 EIP.set_value( in setup() 314 EIP.set_value(EI); in setup() 316 EIP.set_value(make_error<StringError>( in setup()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/Solaris/sys/ |
H A D | regset.h | 32 #undef EIP
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/freebsd/sys/arm64/conf/ |
H A D | std.marvell | 27 device safexcel # Inside Secure EIP-97
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/freebsd/sys/cddl/dev/dtrace/i386/ |
H A D | dtrace_isa.c | 169 pc = dtrace_fuword32(&gregs[EIP]); in dtrace_getustack_common() 393 pc = dtrace_fuword32(&gregs[EIP]); in dtrace_getufpstack() 518 REG_RIP, /* 14 EIP, REG_PC */ in dtrace_getreg()
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/freebsd/cddl/contrib/opensolaris/lib/libdtrace/i386/ |
H A D | regs.sed.in | 58 SED_REPLACE(EIP)
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H A D | regs.d.in | 59 inline int R_EIP = @EIP@;
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | armada3700-periph-clock.txt | 30 15 eip97 EIP 97
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 49 : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP), in X86RegisterInfo() 52 (TT.isArch64Bit() ? X86::RIP : X86::EIP)) { in X86RegisterInfo() 742 for (auto Reg : {X86::EFLAGS, X86::RIP, X86::EIP, X86::IP}) in adjustStackMapLiveOutMask()
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H A D | X86RegisterInfo.td | 243 def EIP : X86Reg<"eip", 0, [IP, HIP]>, DwarfRegNum<[-2, 8, 8]>; 299 def RIP : X86Reg<"rip", 0, [EIP]>, DwarfRegNum<[16, -2, -2]>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
H A D | X86Operand.h | 335 return isMem() && Mem.BaseReg != X86::RIP && Mem.BaseReg != X86::EIP; in isSibMem() 396 getMemBaseReg() != X86::EIP) in isMem512_GR32()
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H A D | X86AsmParser.cpp | 1311 !(BaseReg == X86::RIP || BaseReg == X86::EIP || in CheckBaseRegAndIndexRegAndScale() 1331 if (((BaseReg == X86::RIP || BaseReg == X86::EIP) && IndexReg != 0) || in CheckBaseRegAndIndexRegAndScale() 1332 IndexReg == X86::EIP || IndexReg == X86::RIP || in CheckBaseRegAndIndexRegAndScale() 1384 (BaseReg == X86::RIP || BaseReg == X86::EIP)) { in CheckBaseRegAndIndexRegAndScale()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.cpp | 100 if (Base.isReg() && Base.getReg() == X86::EIP) { in is32BitMemOperand() 424 : X86::EIP; // Should have dwarf #8. in createX86MCRegisterInfo() 474 unsigned InstPtr = is64Bit ? X86::RIP : X86::EIP; in createX86MCAsmInfo()
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H A D | X86WinCOFFTargetStreamer.cpp | 304 case X86::EIP: OS << "$eip"; break; in printFPOReg()
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H A D | X86MCCodeEmitter.cpp | 620 BaseReg == X86::EIP) { // [disp32+rIP] in X86-64 mode in emitMemModRMByte()
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/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
H A D | cp110-system-controller.txt | 37 - 0 2 EIP
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/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
H A D | CodeViewRegisters.def | 84 CV_REGISTER(EIP, 33)
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/freebsd/stand/i386/btx/btx/ |
H A D | btx.S | 217 pushl btx_hdr+0xc # Set EIP
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/freebsd/sys/contrib/edk2/Include/Library/ |
H A D | BaseLib.h | 5422 UINT32 EIP; member
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
H A D | X86Disassembler.cpp | 2220 baseReg = MCOperand::createReg(insn.addressSize == 4 ? X86::EIP : in translateRMMemory()
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/freebsd/contrib/file/magic/Magdir/ |
H A D | msdos | 742 # another wild guess: if real OS/2 LE executables exist, they probably have higher start EIP
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