1 /** @file 2 ACPI 4.0 definitions from the ACPI Specification Revision 4.0a April 5, 2010 3 4 Copyright (c) 2010 - 2022, Intel Corporation. All rights reserved.<BR> 5 SPDX-License-Identifier: BSD-2-Clause-Patent 6 **/ 7 8 #ifndef _ACPI_4_0_H_ 9 #define _ACPI_4_0_H_ 10 11 #include <IndustryStandard/Acpi30.h> 12 13 /// 14 /// _PSD Revision for ACPI 4.0 15 /// 16 #define EFI_ACPI_4_0_AML_PSD_REVISION 0 17 18 // 19 // Ensure proper structure formats 20 // 21 #pragma pack(1) 22 23 /// 24 /// ACPI 4.0 Generic Address Space definition 25 /// 26 typedef struct { 27 UINT8 AddressSpaceId; 28 UINT8 RegisterBitWidth; 29 UINT8 RegisterBitOffset; 30 UINT8 AccessSize; 31 UINT64 Address; 32 } EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE; 33 34 // 35 // Generic Address Space Address IDs 36 // 37 #define EFI_ACPI_4_0_SYSTEM_MEMORY 0 38 #define EFI_ACPI_4_0_SYSTEM_IO 1 39 #define EFI_ACPI_4_0_PCI_CONFIGURATION_SPACE 2 40 #define EFI_ACPI_4_0_EMBEDDED_CONTROLLER 3 41 #define EFI_ACPI_4_0_SMBUS 4 42 #define EFI_ACPI_4_0_FUNCTIONAL_FIXED_HARDWARE 0x7F 43 44 // 45 // Generic Address Space Access Sizes 46 // 47 #define EFI_ACPI_4_0_UNDEFINED 0 48 #define EFI_ACPI_4_0_BYTE 1 49 #define EFI_ACPI_4_0_WORD 2 50 #define EFI_ACPI_4_0_DWORD 3 51 #define EFI_ACPI_4_0_QWORD 4 52 53 // 54 // ACPI 4.0 table structures 55 // 56 57 /// 58 /// Root System Description Pointer Structure 59 /// 60 typedef struct { 61 UINT64 Signature; 62 UINT8 Checksum; 63 UINT8 OemId[6]; 64 UINT8 Revision; 65 UINT32 RsdtAddress; 66 UINT32 Length; 67 UINT64 XsdtAddress; 68 UINT8 ExtendedChecksum; 69 UINT8 Reserved[3]; 70 } EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER; 71 72 /// 73 /// RSD_PTR Revision (as defined in ACPI 4.0b spec.) 74 /// 75 #define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 4.0a) says current value is 2 76 77 /// 78 /// Common table header, this prefaces all ACPI tables, including FACS, but 79 /// excluding the RSD PTR structure 80 /// 81 typedef struct { 82 UINT32 Signature; 83 UINT32 Length; 84 } EFI_ACPI_4_0_COMMON_HEADER; 85 86 // 87 // Root System Description Table 88 // No definition needed as it is a common description table header, the same with 89 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 90 // 91 92 /// 93 /// RSDT Revision (as defined in ACPI 4.0 spec.) 94 /// 95 #define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 96 97 // 98 // Extended System Description Table 99 // No definition needed as it is a common description table header, the same with 100 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 101 // 102 103 /// 104 /// XSDT Revision (as defined in ACPI 4.0 spec.) 105 /// 106 #define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 107 108 /// 109 /// Fixed ACPI Description Table Structure (FADT) 110 /// 111 typedef struct { 112 EFI_ACPI_DESCRIPTION_HEADER Header; 113 UINT32 FirmwareCtrl; 114 UINT32 Dsdt; 115 UINT8 Reserved0; 116 UINT8 PreferredPmProfile; 117 UINT16 SciInt; 118 UINT32 SmiCmd; 119 UINT8 AcpiEnable; 120 UINT8 AcpiDisable; 121 UINT8 S4BiosReq; 122 UINT8 PstateCnt; 123 UINT32 Pm1aEvtBlk; 124 UINT32 Pm1bEvtBlk; 125 UINT32 Pm1aCntBlk; 126 UINT32 Pm1bCntBlk; 127 UINT32 Pm2CntBlk; 128 UINT32 PmTmrBlk; 129 UINT32 Gpe0Blk; 130 UINT32 Gpe1Blk; 131 UINT8 Pm1EvtLen; 132 UINT8 Pm1CntLen; 133 UINT8 Pm2CntLen; 134 UINT8 PmTmrLen; 135 UINT8 Gpe0BlkLen; 136 UINT8 Gpe1BlkLen; 137 UINT8 Gpe1Base; 138 UINT8 CstCnt; 139 UINT16 PLvl2Lat; 140 UINT16 PLvl3Lat; 141 UINT16 FlushSize; 142 UINT16 FlushStride; 143 UINT8 DutyOffset; 144 UINT8 DutyWidth; 145 UINT8 DayAlrm; 146 UINT8 MonAlrm; 147 UINT8 Century; 148 UINT16 IaPcBootArch; 149 UINT8 Reserved1; 150 UINT32 Flags; 151 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ResetReg; 152 UINT8 ResetValue; 153 UINT8 Reserved2[3]; 154 UINT64 XFirmwareCtrl; 155 UINT64 XDsdt; 156 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 157 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 158 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 159 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 160 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 161 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 162 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 163 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 164 } EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE; 165 166 /// 167 /// FADT Version (as defined in ACPI 4.0 spec.) 168 /// 169 #define EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x04 170 171 // 172 // Fixed ACPI Description Table Preferred Power Management Profile 173 // 174 #define EFI_ACPI_4_0_PM_PROFILE_UNSPECIFIED 0 175 #define EFI_ACPI_4_0_PM_PROFILE_DESKTOP 1 176 #define EFI_ACPI_4_0_PM_PROFILE_MOBILE 2 177 #define EFI_ACPI_4_0_PM_PROFILE_WORKSTATION 3 178 #define EFI_ACPI_4_0_PM_PROFILE_ENTERPRISE_SERVER 4 179 #define EFI_ACPI_4_0_PM_PROFILE_SOHO_SERVER 5 180 #define EFI_ACPI_4_0_PM_PROFILE_APPLIANCE_PC 6 181 #define EFI_ACPI_4_0_PM_PROFILE_PERFORMANCE_SERVER 7 182 183 // 184 // Fixed ACPI Description Table Boot Architecture Flags 185 // All other bits are reserved and must be set to 0. 186 // 187 #define EFI_ACPI_4_0_LEGACY_DEVICES BIT0 188 #define EFI_ACPI_4_0_8042 BIT1 189 #define EFI_ACPI_4_0_VGA_NOT_PRESENT BIT2 190 #define EFI_ACPI_4_0_MSI_NOT_SUPPORTED BIT3 191 #define EFI_ACPI_4_0_PCIE_ASPM_CONTROLS BIT4 192 193 // 194 // Fixed ACPI Description Table Fixed Feature Flags 195 // All other bits are reserved and must be set to 0. 196 // 197 #define EFI_ACPI_4_0_WBINVD BIT0 198 #define EFI_ACPI_4_0_WBINVD_FLUSH BIT1 199 #define EFI_ACPI_4_0_PROC_C1 BIT2 200 #define EFI_ACPI_4_0_P_LVL2_UP BIT3 201 #define EFI_ACPI_4_0_PWR_BUTTON BIT4 202 #define EFI_ACPI_4_0_SLP_BUTTON BIT5 203 #define EFI_ACPI_4_0_FIX_RTC BIT6 204 #define EFI_ACPI_4_0_RTC_S4 BIT7 205 #define EFI_ACPI_4_0_TMR_VAL_EXT BIT8 206 #define EFI_ACPI_4_0_DCK_CAP BIT9 207 #define EFI_ACPI_4_0_RESET_REG_SUP BIT10 208 #define EFI_ACPI_4_0_SEALED_CASE BIT11 209 #define EFI_ACPI_4_0_HEADLESS BIT12 210 #define EFI_ACPI_4_0_CPU_SW_SLP BIT13 211 #define EFI_ACPI_4_0_PCI_EXP_WAK BIT14 212 #define EFI_ACPI_4_0_USE_PLATFORM_CLOCK BIT15 213 #define EFI_ACPI_4_0_S4_RTC_STS_VALID BIT16 214 #define EFI_ACPI_4_0_REMOTE_POWER_ON_CAPABLE BIT17 215 #define EFI_ACPI_4_0_FORCE_APIC_CLUSTER_MODEL BIT18 216 #define EFI_ACPI_4_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 217 218 /// 219 /// Firmware ACPI Control Structure 220 /// 221 typedef struct { 222 UINT32 Signature; 223 UINT32 Length; 224 UINT32 HardwareSignature; 225 UINT32 FirmwareWakingVector; 226 UINT32 GlobalLock; 227 UINT32 Flags; 228 UINT64 XFirmwareWakingVector; 229 UINT8 Version; 230 UINT8 Reserved0[3]; 231 UINT32 OspmFlags; 232 UINT8 Reserved1[24]; 233 } EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE; 234 235 /// 236 /// FACS Version (as defined in ACPI 4.0 spec.) 237 /// 238 #define EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 239 240 /// 241 /// Firmware Control Structure Feature Flags 242 /// All other bits are reserved and must be set to 0. 243 /// 244 #define EFI_ACPI_4_0_S4BIOS_F BIT0 245 #define EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F BIT1 246 247 /// 248 /// OSPM Enabled Firmware Control Structure Flags 249 /// All other bits are reserved and must be set to 0. 250 /// 251 #define EFI_ACPI_4_0_OSPM_64BIT_WAKE__F BIT0 252 253 // 254 // Differentiated System Description Table, 255 // Secondary System Description Table 256 // and Persistent System Description Table, 257 // no definition needed as they are common description table header, the same with 258 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 259 // 260 #define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 261 #define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 262 263 /// 264 /// Multiple APIC Description Table header definition. The rest of the table 265 /// must be defined in a platform specific manner. 266 /// 267 typedef struct { 268 EFI_ACPI_DESCRIPTION_HEADER Header; 269 UINT32 LocalApicAddress; 270 UINT32 Flags; 271 } EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 272 273 /// 274 /// MADT Revision (as defined in ACPI 4.0 spec.) 275 /// 276 #define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03 277 278 /// 279 /// Multiple APIC Flags 280 /// All other bits are reserved and must be set to 0. 281 /// 282 #define EFI_ACPI_4_0_PCAT_COMPAT BIT0 283 284 // 285 // Multiple APIC Description Table APIC structure types 286 // All other values between 0x0B an 0xFF are reserved and 287 // will be ignored by OSPM. 288 // 289 #define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC 0x00 290 #define EFI_ACPI_4_0_IO_APIC 0x01 291 #define EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE 0x02 292 #define EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03 293 #define EFI_ACPI_4_0_LOCAL_APIC_NMI 0x04 294 #define EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 295 #define EFI_ACPI_4_0_IO_SAPIC 0x06 296 #define EFI_ACPI_4_0_LOCAL_SAPIC 0x07 297 #define EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES 0x08 298 #define EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC 0x09 299 #define EFI_ACPI_4_0_LOCAL_X2APIC_NMI 0x0A 300 301 // 302 // APIC Structure Definitions 303 // 304 305 /// 306 /// Processor Local APIC Structure Definition 307 /// 308 typedef struct { 309 UINT8 Type; 310 UINT8 Length; 311 UINT8 AcpiProcessorId; 312 UINT8 ApicId; 313 UINT32 Flags; 314 } EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_STRUCTURE; 315 316 /// 317 /// Local APIC Flags. All other bits are reserved and must be 0. 318 /// 319 #define EFI_ACPI_4_0_LOCAL_APIC_ENABLED BIT0 320 321 /// 322 /// IO APIC Structure 323 /// 324 typedef struct { 325 UINT8 Type; 326 UINT8 Length; 327 UINT8 IoApicId; 328 UINT8 Reserved; 329 UINT32 IoApicAddress; 330 UINT32 GlobalSystemInterruptBase; 331 } EFI_ACPI_4_0_IO_APIC_STRUCTURE; 332 333 /// 334 /// Interrupt Source Override Structure 335 /// 336 typedef struct { 337 UINT8 Type; 338 UINT8 Length; 339 UINT8 Bus; 340 UINT8 Source; 341 UINT32 GlobalSystemInterrupt; 342 UINT16 Flags; 343 } EFI_ACPI_4_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 344 345 /// 346 /// Platform Interrupt Sources Structure Definition 347 /// 348 typedef struct { 349 UINT8 Type; 350 UINT8 Length; 351 UINT16 Flags; 352 UINT8 InterruptType; 353 UINT8 ProcessorId; 354 UINT8 ProcessorEid; 355 UINT8 IoSapicVector; 356 UINT32 GlobalSystemInterrupt; 357 UINT32 PlatformInterruptSourceFlags; 358 UINT8 CpeiProcessorOverride; 359 UINT8 Reserved[31]; 360 } EFI_ACPI_4_0_PLATFORM_INTERRUPT_APIC_STRUCTURE; 361 362 // 363 // MPS INTI flags. 364 // All other bits are reserved and must be set to 0. 365 // 366 #define EFI_ACPI_4_0_POLARITY (3 << 0) 367 #define EFI_ACPI_4_0_TRIGGER_MODE (3 << 2) 368 369 /// 370 /// Non-Maskable Interrupt Source Structure 371 /// 372 typedef struct { 373 UINT8 Type; 374 UINT8 Length; 375 UINT16 Flags; 376 UINT32 GlobalSystemInterrupt; 377 } EFI_ACPI_4_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 378 379 /// 380 /// Local APIC NMI Structure 381 /// 382 typedef struct { 383 UINT8 Type; 384 UINT8 Length; 385 UINT8 AcpiProcessorId; 386 UINT16 Flags; 387 UINT8 LocalApicLint; 388 } EFI_ACPI_4_0_LOCAL_APIC_NMI_STRUCTURE; 389 390 /// 391 /// Local APIC Address Override Structure 392 /// 393 typedef struct { 394 UINT8 Type; 395 UINT8 Length; 396 UINT16 Reserved; 397 UINT64 LocalApicAddress; 398 } EFI_ACPI_4_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 399 400 /// 401 /// IO SAPIC Structure 402 /// 403 typedef struct { 404 UINT8 Type; 405 UINT8 Length; 406 UINT8 IoApicId; 407 UINT8 Reserved; 408 UINT32 GlobalSystemInterruptBase; 409 UINT64 IoSapicAddress; 410 } EFI_ACPI_4_0_IO_SAPIC_STRUCTURE; 411 412 /// 413 /// Local SAPIC Structure 414 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 415 /// 416 typedef struct { 417 UINT8 Type; 418 UINT8 Length; 419 UINT8 AcpiProcessorId; 420 UINT8 LocalSapicId; 421 UINT8 LocalSapicEid; 422 UINT8 Reserved[3]; 423 UINT32 Flags; 424 UINT32 ACPIProcessorUIDValue; 425 } EFI_ACPI_4_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 426 427 /// 428 /// Platform Interrupt Sources Structure 429 /// 430 typedef struct { 431 UINT8 Type; 432 UINT8 Length; 433 UINT16 Flags; 434 UINT8 InterruptType; 435 UINT8 ProcessorId; 436 UINT8 ProcessorEid; 437 UINT8 IoSapicVector; 438 UINT32 GlobalSystemInterrupt; 439 UINT32 PlatformInterruptSourceFlags; 440 } EFI_ACPI_4_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 441 442 /// 443 /// Platform Interrupt Source Flags. 444 /// All other bits are reserved and must be set to 0. 445 /// 446 #define EFI_ACPI_4_0_CPEI_PROCESSOR_OVERRIDE BIT0 447 448 /// 449 /// Processor Local x2APIC Structure Definition 450 /// 451 typedef struct { 452 UINT8 Type; 453 UINT8 Length; 454 UINT8 Reserved[2]; 455 UINT32 X2ApicId; 456 UINT32 Flags; 457 UINT32 AcpiProcessorUid; 458 } EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 459 460 /// 461 /// Local x2APIC NMI Structure 462 /// 463 typedef struct { 464 UINT8 Type; 465 UINT8 Length; 466 UINT16 Flags; 467 UINT32 AcpiProcessorUid; 468 UINT8 LocalX2ApicLint; 469 UINT8 Reserved[3]; 470 } EFI_ACPI_4_0_LOCAL_X2APIC_NMI_STRUCTURE; 471 472 /// 473 /// Smart Battery Description Table (SBST) 474 /// 475 typedef struct { 476 EFI_ACPI_DESCRIPTION_HEADER Header; 477 UINT32 WarningEnergyLevel; 478 UINT32 LowEnergyLevel; 479 UINT32 CriticalEnergyLevel; 480 } EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE; 481 482 /// 483 /// SBST Version (as defined in ACPI 4.0 spec.) 484 /// 485 #define EFI_ACPI_4_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 486 487 /// 488 /// Embedded Controller Boot Resources Table (ECDT) 489 /// The table is followed by a null terminated ASCII string that contains 490 /// a fully qualified reference to the name space object. 491 /// 492 typedef struct { 493 EFI_ACPI_DESCRIPTION_HEADER Header; 494 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcControl; 495 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE EcData; 496 UINT32 Uid; 497 UINT8 GpeBit; 498 } EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 499 500 /// 501 /// ECDT Version (as defined in ACPI 4.0 spec.) 502 /// 503 #define EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 504 505 /// 506 /// System Resource Affinity Table (SRAT. The rest of the table 507 /// must be defined in a platform specific manner. 508 /// 509 typedef struct { 510 EFI_ACPI_DESCRIPTION_HEADER Header; 511 UINT32 Reserved1; ///< Must be set to 1 512 UINT64 Reserved2; 513 } EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 514 515 /// 516 /// SRAT Version (as defined in ACPI 4.0 spec.) 517 /// 518 #define EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 519 520 // 521 // SRAT structure types. 522 // All other values between 0x03 an 0xFF are reserved and 523 // will be ignored by OSPM. 524 // 525 #define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 526 #define EFI_ACPI_4_0_MEMORY_AFFINITY 0x01 527 #define EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 528 529 /// 530 /// Processor Local APIC/SAPIC Affinity Structure Definition 531 /// 532 typedef struct { 533 UINT8 Type; 534 UINT8 Length; 535 UINT8 ProximityDomain7To0; 536 UINT8 ApicId; 537 UINT32 Flags; 538 UINT8 LocalSapicEid; 539 UINT8 ProximityDomain31To8[3]; 540 UINT32 ClockDomain; 541 } EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 542 543 /// 544 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 545 /// 546 #define EFI_ACPI_4_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 547 548 /// 549 /// Memory Affinity Structure Definition 550 /// 551 typedef struct { 552 UINT8 Type; 553 UINT8 Length; 554 UINT32 ProximityDomain; 555 UINT16 Reserved1; 556 UINT32 AddressBaseLow; 557 UINT32 AddressBaseHigh; 558 UINT32 LengthLow; 559 UINT32 LengthHigh; 560 UINT32 Reserved2; 561 UINT32 Flags; 562 UINT64 Reserved3; 563 } EFI_ACPI_4_0_MEMORY_AFFINITY_STRUCTURE; 564 565 // 566 // Memory Flags. All other bits are reserved and must be 0. 567 // 568 #define EFI_ACPI_4_0_MEMORY_ENABLED (1 << 0) 569 #define EFI_ACPI_4_0_MEMORY_HOT_PLUGGABLE (1 << 1) 570 #define EFI_ACPI_4_0_MEMORY_NONVOLATILE (1 << 2) 571 572 /// 573 /// Processor Local x2APIC Affinity Structure Definition 574 /// 575 typedef struct { 576 UINT8 Type; 577 UINT8 Length; 578 UINT8 Reserved1[2]; 579 UINT32 ProximityDomain; 580 UINT32 X2ApicId; 581 UINT32 Flags; 582 UINT32 ClockDomain; 583 UINT8 Reserved2[4]; 584 } EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 585 586 /// 587 /// System Locality Distance Information Table (SLIT). 588 /// The rest of the table is a matrix. 589 /// 590 typedef struct { 591 EFI_ACPI_DESCRIPTION_HEADER Header; 592 UINT64 NumberOfSystemLocalities; 593 } EFI_ACPI_4_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 594 595 /// 596 /// SLIT Version (as defined in ACPI 4.0 spec.) 597 /// 598 #define EFI_ACPI_4_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 599 600 /// 601 /// Corrected Platform Error Polling Table (CPEP) 602 /// 603 typedef struct { 604 EFI_ACPI_DESCRIPTION_HEADER Header; 605 UINT8 Reserved[8]; 606 } EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 607 608 /// 609 /// CPEP Version (as defined in ACPI 4.0 spec.) 610 /// 611 #define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 612 613 // 614 // CPEP processor structure types. 615 // 616 #define EFI_ACPI_4_0_CPEP_PROCESSOR_APIC_SAPIC 0x00 617 618 /// 619 /// Corrected Platform Error Polling Processor Structure Definition 620 /// 621 typedef struct { 622 UINT8 Type; 623 UINT8 Length; 624 UINT8 ProcessorId; 625 UINT8 ProcessorEid; 626 UINT32 PollingInterval; 627 } EFI_ACPI_4_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 628 629 /// 630 /// Maximum System Characteristics Table (MSCT) 631 /// 632 typedef struct { 633 EFI_ACPI_DESCRIPTION_HEADER Header; 634 UINT32 OffsetProxDomInfo; 635 UINT32 MaximumNumberOfProximityDomains; 636 UINT32 MaximumNumberOfClockDomains; 637 UINT64 MaximumPhysicalAddress; 638 } EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 639 640 /// 641 /// MSCT Version (as defined in ACPI 4.0 spec.) 642 /// 643 #define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 644 645 /// 646 /// Maximum Proximity Domain Information Structure Definition 647 /// 648 typedef struct { 649 UINT8 Revision; 650 UINT8 Length; 651 UINT32 ProximityDomainRangeLow; 652 UINT32 ProximityDomainRangeHigh; 653 UINT32 MaximumProcessorCapacity; 654 UINT64 MaximumMemoryCapacity; 655 } EFI_ACPI_4_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 656 657 /// 658 /// Boot Error Record Table (BERT) 659 /// 660 typedef struct { 661 EFI_ACPI_DESCRIPTION_HEADER Header; 662 UINT32 BootErrorRegionLength; 663 UINT64 BootErrorRegion; 664 } EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_HEADER; 665 666 /// 667 /// BERT Version (as defined in ACPI 4.0 spec.) 668 /// 669 #define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 670 671 /// 672 /// Boot Error Region Block Status Definition 673 /// 674 typedef struct { 675 UINT32 UncorrectableErrorValid : 1; 676 UINT32 CorrectableErrorValid : 1; 677 UINT32 MultipleUncorrectableErrors : 1; 678 UINT32 MultipleCorrectableErrors : 1; 679 UINT32 ErrorDataEntryCount : 10; 680 UINT32 Reserved : 18; 681 } EFI_ACPI_4_0_ERROR_BLOCK_STATUS; 682 683 /// 684 /// Boot Error Region Definition 685 /// 686 typedef struct { 687 EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus; 688 UINT32 RawDataOffset; 689 UINT32 RawDataLength; 690 UINT32 DataLength; 691 UINT32 ErrorSeverity; 692 } EFI_ACPI_4_0_BOOT_ERROR_REGION_STRUCTURE; 693 694 // 695 // Boot Error Severity types 696 // 697 #define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTABLE 0x00 698 #define EFI_ACPI_4_0_ERROR_SEVERITY_RECOVERABLE 0x00 699 #define EFI_ACPI_4_0_ERROR_SEVERITY_FATAL 0x01 700 #define EFI_ACPI_4_0_ERROR_SEVERITY_CORRECTED 0x02 701 #define EFI_ACPI_4_0_ERROR_SEVERITY_NONE 0x03 702 703 /// 704 /// Generic Error Data Entry Definition 705 /// 706 typedef struct { 707 UINT8 SectionType[16]; 708 UINT32 ErrorSeverity; 709 UINT16 Revision; 710 UINT8 ValidationBits; 711 UINT8 Flags; 712 UINT32 ErrorDataLength; 713 UINT8 FruId[16]; 714 UINT8 FruText[20]; 715 } EFI_ACPI_4_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 716 717 /// 718 /// Generic Error Data Entry Version (as defined in ACPI 4.0 spec.) 719 /// 720 #define EFI_ACPI_4_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201 721 722 /// 723 /// HEST - Hardware Error Source Table 724 /// 725 typedef struct { 726 EFI_ACPI_DESCRIPTION_HEADER Header; 727 UINT32 ErrorSourceCount; 728 } EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 729 730 /// 731 /// HEST Version (as defined in ACPI 4.0 spec.) 732 /// 733 #define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 734 735 // 736 // Error Source structure types. 737 // 738 #define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 739 #define EFI_ACPI_4_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 740 #define EFI_ACPI_4_0_IA32_ARCHITECTURE_NMI_ERROR 0x02 741 #define EFI_ACPI_4_0_PCI_EXPRESS_ROOT_PORT_AER 0x06 742 #define EFI_ACPI_4_0_PCI_EXPRESS_DEVICE_AER 0x07 743 #define EFI_ACPI_4_0_PCI_EXPRESS_BRIDGE_AER 0x08 744 #define EFI_ACPI_4_0_GENERIC_HARDWARE_ERROR 0x09 745 746 // 747 // Error Source structure flags. 748 // 749 #define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 750 #define EFI_ACPI_4_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 751 752 /// 753 /// IA-32 Architecture Machine Check Exception Structure Definition 754 /// 755 typedef struct { 756 UINT16 Type; 757 UINT16 SourceId; 758 UINT8 Reserved0[2]; 759 UINT8 Flags; 760 UINT8 Enabled; 761 UINT32 NumberOfRecordsToPreAllocate; 762 UINT32 MaxSectionsPerRecord; 763 UINT64 GlobalCapabilityInitData; 764 UINT64 GlobalControlInitData; 765 UINT8 NumberOfHardwareBanks; 766 UINT8 Reserved1[7]; 767 } EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 768 769 /// 770 /// IA-32 Architecture Machine Check Bank Structure Definition 771 /// 772 typedef struct { 773 UINT8 BankNumber; 774 UINT8 ClearStatusOnInitialization; 775 UINT8 StatusDataFormat; 776 UINT8 Reserved0; 777 UINT32 ControlRegisterMsrAddress; 778 UINT64 ControlInitData; 779 UINT32 StatusRegisterMsrAddress; 780 UINT32 AddressRegisterMsrAddress; 781 UINT32 MiscRegisterMsrAddress; 782 } EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 783 784 /// 785 /// IA-32 Architecture Machine Check Bank Structure MCA data format 786 /// 787 #define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 788 #define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 789 #define EFI_ACPI_4_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 790 791 // 792 // Hardware Error Notification types. All other values are reserved 793 // 794 #define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 795 #define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 796 #define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 797 #define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 798 #define EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 799 800 /// 801 /// Hardware Error Notification Configuration Write Enable Structure Definition 802 /// 803 typedef struct { 804 UINT16 Type : 1; 805 UINT16 PollInterval : 1; 806 UINT16 SwitchToPollingThresholdValue : 1; 807 UINT16 SwitchToPollingThresholdWindow : 1; 808 UINT16 ErrorThresholdValue : 1; 809 UINT16 ErrorThresholdWindow : 1; 810 UINT16 Reserved : 10; 811 } EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 812 813 /// 814 /// Hardware Error Notification Structure Definition 815 /// 816 typedef struct { 817 UINT8 Type; 818 UINT8 Length; 819 EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 820 UINT32 PollInterval; 821 UINT32 Vector; 822 UINT32 SwitchToPollingThresholdValue; 823 UINT32 SwitchToPollingThresholdWindow; 824 UINT32 ErrorThresholdValue; 825 UINT32 ErrorThresholdWindow; 826 } EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 827 828 /// 829 /// IA-32 Architecture Corrected Machine Check Structure Definition 830 /// 831 typedef struct { 832 UINT16 Type; 833 UINT16 SourceId; 834 UINT8 Reserved0[2]; 835 UINT8 Flags; 836 UINT8 Enabled; 837 UINT32 NumberOfRecordsToPreAllocate; 838 UINT32 MaxSectionsPerRecord; 839 EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 840 UINT8 NumberOfHardwareBanks; 841 UINT8 Reserved1[3]; 842 } EFI_ACPI_4_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 843 844 /// 845 /// IA-32 Architecture NMI Error Structure Definition 846 /// 847 typedef struct { 848 UINT16 Type; 849 UINT16 SourceId; 850 UINT8 Reserved0[2]; 851 UINT32 NumberOfRecordsToPreAllocate; 852 UINT32 MaxSectionsPerRecord; 853 UINT32 MaxRawDataLength; 854 } EFI_ACPI_4_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 855 856 /// 857 /// PCI Express Root Port AER Structure Definition 858 /// 859 typedef struct { 860 UINT16 Type; 861 UINT16 SourceId; 862 UINT8 Reserved0[2]; 863 UINT8 Flags; 864 UINT8 Enabled; 865 UINT32 NumberOfRecordsToPreAllocate; 866 UINT32 MaxSectionsPerRecord; 867 UINT32 Bus; 868 UINT16 Device; 869 UINT16 Function; 870 UINT16 DeviceControl; 871 UINT8 Reserved1[2]; 872 UINT32 UncorrectableErrorMask; 873 UINT32 UncorrectableErrorSeverity; 874 UINT32 CorrectableErrorMask; 875 UINT32 AdvancedErrorCapabilitiesAndControl; 876 UINT32 RootErrorCommand; 877 } EFI_ACPI_4_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 878 879 /// 880 /// PCI Express Device AER Structure Definition 881 /// 882 typedef struct { 883 UINT16 Type; 884 UINT16 SourceId; 885 UINT8 Reserved0[2]; 886 UINT8 Flags; 887 UINT8 Enabled; 888 UINT32 NumberOfRecordsToPreAllocate; 889 UINT32 MaxSectionsPerRecord; 890 UINT32 Bus; 891 UINT16 Device; 892 UINT16 Function; 893 UINT16 DeviceControl; 894 UINT8 Reserved1[2]; 895 UINT32 UncorrectableErrorMask; 896 UINT32 UncorrectableErrorSeverity; 897 UINT32 CorrectableErrorMask; 898 UINT32 AdvancedErrorCapabilitiesAndControl; 899 } EFI_ACPI_4_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 900 901 /// 902 /// PCI Express Bridge AER Structure Definition 903 /// 904 typedef struct { 905 UINT16 Type; 906 UINT16 SourceId; 907 UINT8 Reserved0[2]; 908 UINT8 Flags; 909 UINT8 Enabled; 910 UINT32 NumberOfRecordsToPreAllocate; 911 UINT32 MaxSectionsPerRecord; 912 UINT32 Bus; 913 UINT16 Device; 914 UINT16 Function; 915 UINT16 DeviceControl; 916 UINT8 Reserved1[2]; 917 UINT32 UncorrectableErrorMask; 918 UINT32 UncorrectableErrorSeverity; 919 UINT32 CorrectableErrorMask; 920 UINT32 AdvancedErrorCapabilitiesAndControl; 921 UINT32 SecondaryUncorrectableErrorMask; 922 UINT32 SecondaryUncorrectableErrorSeverity; 923 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 924 } EFI_ACPI_4_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 925 926 /// 927 /// Generic Hardware Error Source Structure Definition 928 /// 929 typedef struct { 930 UINT16 Type; 931 UINT16 SourceId; 932 UINT16 RelatedSourceId; 933 UINT8 Flags; 934 UINT8 Enabled; 935 UINT32 NumberOfRecordsToPreAllocate; 936 UINT32 MaxSectionsPerRecord; 937 UINT32 MaxRawDataLength; 938 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 939 EFI_ACPI_4_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 940 UINT32 ErrorStatusBlockLength; 941 } EFI_ACPI_4_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 942 943 /// 944 /// Generic Error Status Definition 945 /// 946 typedef struct { 947 EFI_ACPI_4_0_ERROR_BLOCK_STATUS BlockStatus; 948 UINT32 RawDataOffset; 949 UINT32 RawDataLength; 950 UINT32 DataLength; 951 UINT32 ErrorSeverity; 952 } EFI_ACPI_4_0_GENERIC_ERROR_STATUS_STRUCTURE; 953 954 /// 955 /// ERST - Error Record Serialization Table 956 /// 957 typedef struct { 958 EFI_ACPI_DESCRIPTION_HEADER Header; 959 UINT32 SerializationHeaderSize; 960 UINT8 Reserved0[4]; 961 UINT32 InstructionEntryCount; 962 } EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 963 964 /// 965 /// ERST Version (as defined in ACPI 4.0 spec.) 966 /// 967 #define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 968 969 /// 970 /// ERST Serialization Actions 971 /// 972 #define EFI_ACPI_4_0_ERST_BEGIN_WRITE_OPERATION 0x00 973 #define EFI_ACPI_4_0_ERST_BEGIN_READ_OPERATION 0x01 974 #define EFI_ACPI_4_0_ERST_BEGIN_CLEAR_OPERATION 0x02 975 #define EFI_ACPI_4_0_ERST_END_OPERATION 0x03 976 #define EFI_ACPI_4_0_ERST_SET_RECORD_OFFSET 0x04 977 #define EFI_ACPI_4_0_ERST_EXECUTE_OPERATION 0x05 978 #define EFI_ACPI_4_0_ERST_CHECK_BUSY_STATUS 0x06 979 #define EFI_ACPI_4_0_ERST_GET_COMMAND_STATUS 0x07 980 #define EFI_ACPI_4_0_ERST_GET_RECORD_IDENTIFIER 0x08 981 #define EFI_ACPI_4_0_ERST_SET_RECORD_IDENTIFIER 0x09 982 #define EFI_ACPI_4_0_ERST_GET_RECORD_COUNT 0x0A 983 #define EFI_ACPI_4_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 984 #define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 985 #define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 986 #define EFI_ACPI_4_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 987 988 /// 989 /// ERST Action Command Status 990 /// 991 #define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00 992 #define EFI_ACPI_4_0_EINJ_STATUS_NOT_ENOUGH_SPACE 0x01 993 #define EFI_ACPI_4_0_EINJ_STATUS_HARDWARE_NOT_AVAILABLE 0x02 994 #define EFI_ACPI_4_0_EINJ_STATUS_FAILED 0x03 995 #define EFI_ACPI_4_0_EINJ_STATUS_RECORD_STORE_EMPTY 0x04 996 #define EFI_ACPI_4_0_EINJ_STATUS_RECORD_NOT_FOUND 0x05 997 998 /// 999 /// ERST Serialization Instructions 1000 /// 1001 #define EFI_ACPI_4_0_ERST_READ_REGISTER 0x00 1002 #define EFI_ACPI_4_0_ERST_READ_REGISTER_VALUE 0x01 1003 #define EFI_ACPI_4_0_ERST_WRITE_REGISTER 0x02 1004 #define EFI_ACPI_4_0_ERST_WRITE_REGISTER_VALUE 0x03 1005 #define EFI_ACPI_4_0_ERST_NOOP 0x04 1006 #define EFI_ACPI_4_0_ERST_LOAD_VAR1 0x05 1007 #define EFI_ACPI_4_0_ERST_LOAD_VAR2 0x06 1008 #define EFI_ACPI_4_0_ERST_STORE_VAR1 0x07 1009 #define EFI_ACPI_4_0_ERST_ADD 0x08 1010 #define EFI_ACPI_4_0_ERST_SUBTRACT 0x09 1011 #define EFI_ACPI_4_0_ERST_ADD_VALUE 0x0A 1012 #define EFI_ACPI_4_0_ERST_SUBTRACT_VALUE 0x0B 1013 #define EFI_ACPI_4_0_ERST_STALL 0x0C 1014 #define EFI_ACPI_4_0_ERST_STALL_WHILE_TRUE 0x0D 1015 #define EFI_ACPI_4_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 1016 #define EFI_ACPI_4_0_ERST_GOTO 0x0F 1017 #define EFI_ACPI_4_0_ERST_SET_SRC_ADDRESS_BASE 0x10 1018 #define EFI_ACPI_4_0_ERST_SET_DST_ADDRESS_BASE 0x11 1019 #define EFI_ACPI_4_0_ERST_MOVE_DATA 0x12 1020 1021 /// 1022 /// ERST Instruction Flags 1023 /// 1024 #define EFI_ACPI_4_0_ERST_PRESERVE_REGISTER 0x01 1025 1026 /// 1027 /// ERST Serialization Instruction Entry 1028 /// 1029 typedef struct { 1030 UINT8 SerializationAction; 1031 UINT8 Instruction; 1032 UINT8 Flags; 1033 UINT8 Reserved0; 1034 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1035 UINT64 Value; 1036 UINT64 Mask; 1037 } EFI_ACPI_4_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 1038 1039 /// 1040 /// EINJ - Error Injection Table 1041 /// 1042 typedef struct { 1043 EFI_ACPI_DESCRIPTION_HEADER Header; 1044 UINT32 InjectionHeaderSize; 1045 UINT8 InjectionFlags; 1046 UINT8 Reserved0[3]; 1047 UINT32 InjectionEntryCount; 1048 } EFI_ACPI_4_0_ERROR_INJECTION_TABLE_HEADER; 1049 1050 /// 1051 /// EINJ Version (as defined in ACPI 4.0 spec.) 1052 /// 1053 #define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_REVISION 0x01 1054 1055 /// 1056 /// EINJ Error Injection Actions 1057 /// 1058 #define EFI_ACPI_4_0_EINJ_BEGIN_INJECTION_OPERATION 0x00 1059 #define EFI_ACPI_4_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 1060 #define EFI_ACPI_4_0_EINJ_SET_ERROR_TYPE 0x02 1061 #define EFI_ACPI_4_0_EINJ_GET_ERROR_TYPE 0x03 1062 #define EFI_ACPI_4_0_EINJ_END_OPERATION 0x04 1063 #define EFI_ACPI_4_0_EINJ_EXECUTE_OPERATION 0x05 1064 #define EFI_ACPI_4_0_EINJ_CHECK_BUSY_STATUS 0x06 1065 #define EFI_ACPI_4_0_EINJ_GET_COMMAND_STATUS 0x07 1066 #define EFI_ACPI_4_0_EINJ_TRIGGER_ERROR 0xFF 1067 1068 /// 1069 /// EINJ Action Command Status 1070 /// 1071 #define EFI_ACPI_4_0_EINJ_STATUS_SUCCESS 0x00 1072 #define EFI_ACPI_4_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01 1073 #define EFI_ACPI_4_0_EINJ_STATUS_INVALID_ACCESS 0x02 1074 1075 /// 1076 /// EINJ Error Type Definition 1077 /// 1078 #define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 1079 #define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 1080 #define EFI_ACPI_4_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 1081 #define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 1082 #define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 1083 #define EFI_ACPI_4_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 1084 #define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 1085 #define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 1086 #define EFI_ACPI_4_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 1087 #define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 1088 #define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 1089 #define EFI_ACPI_4_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 1090 1091 /// 1092 /// EINJ Injection Instructions 1093 /// 1094 #define EFI_ACPI_4_0_EINJ_READ_REGISTER 0x00 1095 #define EFI_ACPI_4_0_EINJ_READ_REGISTER_VALUE 0x01 1096 #define EFI_ACPI_4_0_EINJ_WRITE_REGISTER 0x02 1097 #define EFI_ACPI_4_0_EINJ_WRITE_REGISTER_VALUE 0x03 1098 #define EFI_ACPI_4_0_EINJ_NOOP 0x04 1099 1100 /// 1101 /// EINJ Instruction Flags 1102 /// 1103 #define EFI_ACPI_4_0_EINJ_PRESERVE_REGISTER 0x01 1104 1105 /// 1106 /// EINJ Injection Instruction Entry 1107 /// 1108 typedef struct { 1109 UINT8 InjectionAction; 1110 UINT8 Instruction; 1111 UINT8 Flags; 1112 UINT8 Reserved0; 1113 EFI_ACPI_4_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1114 UINT64 Value; 1115 UINT64 Mask; 1116 } EFI_ACPI_4_0_EINJ_INJECTION_INSTRUCTION_ENTRY; 1117 1118 /// 1119 /// EINJ Trigger Action Table 1120 /// 1121 typedef struct { 1122 UINT32 HeaderSize; 1123 UINT32 Revision; 1124 UINT32 TableSize; 1125 UINT32 EntryCount; 1126 } EFI_ACPI_4_0_EINJ_TRIGGER_ACTION_TABLE; 1127 1128 // 1129 // Known table signatures 1130 // 1131 1132 /// 1133 /// "RSD PTR " Root System Description Pointer 1134 /// 1135 #define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 1136 1137 /// 1138 /// "APIC" Multiple APIC Description Table 1139 /// 1140 #define EFI_ACPI_4_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 1141 1142 /// 1143 /// "BERT" Boot Error Record Table 1144 /// 1145 #define EFI_ACPI_4_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 1146 1147 /// 1148 /// "CPEP" Corrected Platform Error Polling Table 1149 /// 1150 #define EFI_ACPI_4_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 1151 1152 /// 1153 /// "DSDT" Differentiated System Description Table 1154 /// 1155 #define EFI_ACPI_4_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 1156 1157 /// 1158 /// "ECDT" Embedded Controller Boot Resources Table 1159 /// 1160 #define EFI_ACPI_4_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 1161 1162 /// 1163 /// "EINJ" Error Injection Table 1164 /// 1165 #define EFI_ACPI_4_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 1166 1167 /// 1168 /// "ERST" Error Record Serialization Table 1169 /// 1170 #define EFI_ACPI_4_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 1171 1172 /// 1173 /// "FACP" Fixed ACPI Description Table 1174 /// 1175 #define EFI_ACPI_4_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 1176 1177 /// 1178 /// "FACS" Firmware ACPI Control Structure 1179 /// 1180 #define EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 1181 1182 /// 1183 /// "HEST" Hardware Error Source Table 1184 /// 1185 #define EFI_ACPI_4_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 1186 1187 /// 1188 /// "MSCT" Maximum System Characteristics Table 1189 /// 1190 #define EFI_ACPI_4_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 1191 1192 /// 1193 /// "PSDT" Persistent System Description Table 1194 /// 1195 #define EFI_ACPI_4_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 1196 1197 /// 1198 /// "RSDT" Root System Description Table 1199 /// 1200 #define EFI_ACPI_4_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 1201 1202 /// 1203 /// "SBST" Smart Battery Specification Table 1204 /// 1205 #define EFI_ACPI_4_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 1206 1207 /// 1208 /// "SLIT" System Locality Information Table 1209 /// 1210 #define EFI_ACPI_4_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 1211 1212 /// 1213 /// "SRAT" System Resource Affinity Table 1214 /// 1215 #define EFI_ACPI_4_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 1216 1217 /// 1218 /// "SSDT" Secondary System Description Table 1219 /// 1220 #define EFI_ACPI_4_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 1221 1222 /// 1223 /// "XSDT" Extended System Description Table 1224 /// 1225 #define EFI_ACPI_4_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 1226 1227 /// 1228 /// "BOOT" MS Simple Boot Spec 1229 /// 1230 #define EFI_ACPI_4_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 1231 1232 /// 1233 /// "DBGP" MS Debug Port Spec 1234 /// 1235 #define EFI_ACPI_4_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 1236 1237 /// 1238 /// "DMAR" DMA Remapping Table 1239 /// 1240 #define EFI_ACPI_4_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 1241 1242 /// 1243 /// "ETDT" Event Timer Description Table 1244 /// 1245 #define EFI_ACPI_4_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 1246 1247 /// 1248 /// "HPET" IA-PC High Precision Event Timer Table 1249 /// 1250 #define EFI_ACPI_4_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 1251 1252 /// 1253 /// "iBFT" iSCSI Boot Firmware Table 1254 /// 1255 #define EFI_ACPI_4_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 1256 1257 /// 1258 /// "IVRS" I/O Virtualization Reporting Structure 1259 /// 1260 #define EFI_ACPI_4_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 1261 1262 /// 1263 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 1264 /// 1265 #define EFI_ACPI_4_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 1266 1267 /// 1268 /// "MCHI" Management Controller Host Interface Table 1269 /// 1270 #define EFI_ACPI_4_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 1271 1272 /// 1273 /// "SPCR" Serial Port Console Redirection Table 1274 /// 1275 #define EFI_ACPI_4_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 1276 1277 /// 1278 /// "SPMI" Server Platform Management Interface Table 1279 /// 1280 #define EFI_ACPI_4_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 1281 1282 /// 1283 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 1284 /// 1285 #define EFI_ACPI_4_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 1286 1287 /// 1288 /// "UEFI" UEFI ACPI Data Table 1289 /// 1290 #define EFI_ACPI_4_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 1291 1292 /// 1293 /// "WAET" Windows ACPI Enlightenment Table 1294 /// 1295 #define EFI_ACPI_4_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 1296 1297 /// 1298 /// "WDAT" Watchdog Action Table 1299 /// 1300 #define EFI_ACPI_4_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 1301 1302 /// 1303 /// "WDRT" Watchdog Resource Table 1304 /// 1305 #define EFI_ACPI_4_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 1306 1307 #pragma pack() 1308 1309 #endif 1310