Searched refs:DstLane (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 493 int DstLane; in matchINS() local
494 std::tie(DstIsLeft, DstLane) = *DstIsLeftAndDstLane; in matchINS()
500 int SrcLane = ShuffleMask[DstLane]; in matchINS()
506 MatchInfo = std::make_tuple(DstVec, DstLane, SrcVec, SrcLane); in matchINS()
517 int DstLane, SrcLane; in applyINS() local
518 std::tie(DstVec, DstLane, SrcVec, SrcLane) = MatchInfo; in applyINS()
521 auto DstCst = Builder.buildConstant(LLT::scalar(64), DstLane); in applyINS()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 5081 unsigned DstLane = 0, SrcLane = 0; in setExecutionDomain() local
5083 DDst = getCorrespondingDRegAndLane(TRI, DstReg, DstLane); in setExecutionDomain()
5130 MCRegister CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5134 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5140 if (SrcLane == DstLane) in setExecutionDomain()
5148 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5152 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5158 if (SrcLane != DstLane) in setExecutionDomain()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15362 int DstLane = i / NumEltsPerLane; in lowerShuffleAsLanePermuteAndPermute() local
15367 int DstSubStart = DstLane * NumSublanesPerLane; in lowerShuffleAsLanePermuteAndPermute()
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